Ultraviolet Positioning via TDOA: Error Analysis and System Prototype

TL;DR

This work develops a UV TDOA positioning system that operates under photon-counting detection and uses three transmitters synchronized by a PPS clock. It explicitly models and decomposes the positioning error into transmitter clock timing error and receiver synchronization error, deriving an MSE framework with $E[\Delta \mathbf{u}\,\Delta \mathbf{u}^T]$ and $e_p = \sqrt{\mathrm{tr}(E[\Delta \mathbf{u}\,\Delta \mathbf{u}^T])}$, and showing how clock jitter $\sigma_{clock}$ and chip-offset synchronization $\varepsilon$ contribute to the total error. The authors implement a real-time FPGA prototype with UV PMT detection, and validate the approach through outdoor experiments that yield average positioning errors around $9$–$11$ m, in good agreement with theory and simulations. The results indicate photon-counting UV TDOA is feasible and highlight transmitter clock synchronization as a key lever for substantial accuracy improvements via differential timing corrections. Overall, the work demonstrates a viable UV-based localization pipeline and provides a concrete path to tighter accuracy through enhanced clock alignment between transmitters.

Abstract

This work performs the design, real-time hardware realization, and experimental evaluation of a positioning system by ultra-violet (UV) communication under photon-level signal detection. The positioning is based on time-difference of arrival (TDOA) principle. Time division-based transmission of synchronization sequence from three transmitters with known positions is applied. We investigate the positioning error via decomposing it into two parts, the transmitter-side timing error and the receiver-side synchronization error. The theoretical average error matches well with the simulation results, which indicates that theoretical fitting can provide reliable guidance and prediction for hardware experiments. We also conduct real-time hardware realization of the TDOA-based positioning system using Field Programmable Gate Array (FPGA), which is experimentally evaluated via outdoor experiments. Experimental results match well with the theoretical and simulation results.

Figures (20)

• Figure 1: $\ $Schematic diagram of TDOA principle.
• Figure 2: $\ $Experimental platform of the atomic clock timing error characterization.
• Figure 3: $\ $Empirical probability distribution of rising edge error of atomic clock.
• Figure 4: $\ $The timeline of the synchronization.
• Figure 5: $\ $Schematic diagram of location range.