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Accelerating Computer Architecture Simulation through Machine Learning

Wajid Ali, Ayaz Akram

TL;DR

The paper tackles the slowdown of cycle-level computer architecture simulations by proposing ML-assisted prediction to accelerate architectural exploration. It investigates two integration pathways—using microarchitecture-independent application statistics and incorporating microarchitectural features—to model gem5 behavior, with a Random Forest IPC predictor trained on a hybrid feature set. The results show IPC predictions with a RMSE of less than $0.1$, and normalization by instruction count extends reliable forecasts to longer simulation intervals, while feature-importance analysis highlights cache sizes as key drivers. This approach demonstrates a promising route to faster, yet accurate, architectural design exploration, serving as an initial step toward integrating ML into traditional simulators for broader speedups.

Abstract

This paper presents our approach to accelerate computer architecture simulation by leveraging machine learning techniques. Traditional computer architecture simulations are time-consuming, making it challenging to explore different design choices efficiently. Our proposed model utilizes a combination of application features and micro-architectural features to predict the performance of an application. These features are derived from simulations of a small portion of the application. We demonstrate the effectiveness of our approach by building and evaluating a machine learning model that offers significant speedup in architectural exploration. This model demonstrates the ability to predict IPC values for the testing data with a root mean square error of less than 0.1.

Accelerating Computer Architecture Simulation through Machine Learning

TL;DR

The paper tackles the slowdown of cycle-level computer architecture simulations by proposing ML-assisted prediction to accelerate architectural exploration. It investigates two integration pathways—using microarchitecture-independent application statistics and incorporating microarchitectural features—to model gem5 behavior, with a Random Forest IPC predictor trained on a hybrid feature set. The results show IPC predictions with a RMSE of less than , and normalization by instruction count extends reliable forecasts to longer simulation intervals, while feature-importance analysis highlights cache sizes as key drivers. This approach demonstrates a promising route to faster, yet accurate, architectural design exploration, serving as an initial step toward integrating ML into traditional simulators for broader speedups.

Abstract

This paper presents our approach to accelerate computer architecture simulation by leveraging machine learning techniques. Traditional computer architecture simulations are time-consuming, making it challenging to explore different design choices efficiently. Our proposed model utilizes a combination of application features and micro-architectural features to predict the performance of an application. These features are derived from simulations of a small portion of the application. We demonstrate the effectiveness of our approach by building and evaluating a machine learning model that offers significant speedup in architectural exploration. This model demonstrates the ability to predict IPC values for the testing data with a root mean square error of less than 0.1.
Paper Structure (16 sections, 5 figures, 2 tables)

This paper contains 16 sections, 5 figures, 2 tables.

Figures (5)

  • Figure 1: Predicted vs. Actual IPC
  • Figure 2: Predicted vs. Actual IPC when the training data is normalized to the instruction count.
  • Figure 3: Residual analysis for IPC Prediction.
  • Figure 4: Residual analysis for IPC prediction when the training data is normalized to the instruction count.
  • Figure 5: Feature importance for IPC prediction