Stochastic Nonlinear Dynamical Modelling of SRAM Bitcells in Retention Mode

TL;DR

An unidimensional model is provided, fully characterizable by conventional deterministic SPICE simulations, fully characterizable by conventional deterministic SPICE simulations, insightfully explaining the mechanism of intrinsic noise-induced bit flips.

Abstract

SRAM bitcells in retention mode behave as autonomous stochastic nonlinear dynamical systems. From observation of variability-aware transient noise simulations, we provide an unidimensional model, fully characterizable by conventional deterministic SPICE simulations, insightfully explaining the mechanism of intrinsic noise-induced bit flips. The proposed model is exploited to, first, explain the reported inaccuracy of existing closed-form near-equilibrium formulas aimed at predicting the mean time to failure and, secondly, to propose a closer estimate attractive in terms of CPU time.

Figures (3)

• Figure 1: \ref{['fig_SRAM']} SRAM bitcell in retention mode, with series-voltage sources modelling process variations. Illustrated below: $\delta V_1 = -\delta V_2 = 55mV$. \ref{['fig_bit_flip']} Transient simulation of a noise-induced bit flip in the 6T SRAM bitcell. \ref{['fig_state_space']} State trajectory of the bit flip of \ref{['fig_bit_flip']} in the state space. The nominal and modified VTCs of the inverters are shown in blue and green, respectively. The preferential reaction coordinate $\tilde{v}$ is shown in violet. Illustrated case: $28nm$ FD-SOI Single-P-Well (SPW) SRAM cell (inverters made of RVT nMOS and LVT pMOS; RVT nMOS access transistors) of minimal transistor dimensions $L_\mathrm{n} = L_\mathrm{p} = 30nm$ and $W_\mathrm{n} = W_\mathrm{p} = 80nm$, SPW bias $V_{\mathrm{B}} = 0$, operating at $V_{\mathrm{DD}} = 200mV$ and $T = 300K$. Bandwidth of the generated noise: $f_{\mathrm{max}} = 1GHz$ ($\mathop{}\!\mathrm{d}{t} = 500ps$) LASCAS2024.
• Figure 2: Extraction of the deterministic drift term in \ref{['eq:dvv/dt']}. Near-equilibrium approximations inherent to Kish's formula are shown in red. \ref{['fig_h']}$h(\tilde{v})$. \ref{['fig_E']} Quasi potential $\mathcal{U}(\tilde{v}) = - \int_{0}^{\tilde{v}} h(\tilde{v}') \,\mathop{}\!\mathrm{d}{\tilde{v}'}$. Illustrated case: same as \ref{['fig_bit_flip_state_space']}.
• Figure 3: Comparison between the $MTTF$ estimated empirically from transient noise simulations (100.0 like \ref{['fig_bit_flip']} for each $\delta V$ case LASCAS2024), from the model \ref{['eq:dvv/dt']}, and predictions of analytical near-equilibrium formulas.