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Margin Propagation based XOR-SAT Solvers for Decoding of LDPC Codes

Ankita Nandi, Shantanu Chakrabartty, Chetan Singh Thakur

TL;DR

This work reframes LDPC decoding as an XOR-SAT optimization problem and introduces a low-complexity solver based on Margin Propagation (MP). By constructing an XOR-SAT objective with a log-sum-exponential formulation and augmenting it with channel information through normalization, the MP-XOR-SAT decoder achieves soft-decision decoding without multipliers. The method demonstrates near-SPA performance across multiple LDPC code families while requiring far fewer iterations than gradient-based bit-flipping approaches, and it offers significant hardware benefits due to its multiplier-free computations. The results indicate a promising, hardware-friendly path for efficient LDPC decoding, with potential for analog or mixed-signal implementations and further optimization of hyper-parameters. Overall, the paper delivers a novel, fast, and low-complexity decoding strategy that narrows the gap to SPA in AWGN channels and informs future decoder design and hardware realizations.

Abstract

Decoding of Low-Density Parity Check (LDPC) codes can be viewed as a special case of XOR-SAT problems, for which low-computational complexity bit-flipping algorithms have been proposed in the literature. However, a performance gap exists between the bit-flipping LDPC decoding algorithms and the benchmark LDPC decoding algorithms, such as the Sum-Product Algorithm (SPA). In this paper, we propose an XOR-SAT solver using log-sum-exponential functions and demonstrate its advantages for LDPC decoding. This is then approximated using the Margin Propagation formulation to attain a low-complexity LDPC decoder. The proposed algorithm uses soft information to decide the bit-flips that maximize the number of parity check constraints satisfied over an optimization function. The proposed solver can achieve results that are within $0.1$dB of the Sum-Product Algorithm for the same number of code iterations. It is also at least 10x lesser than other Gradient-Descent Bit Flipping decoding algorithms, which are also bit-flipping algorithms based on optimization functions. The approximation using the Margin Propagation formulation does not require any multipliers, resulting in significantly lower computational complexity than other soft-decision Bit-Flipping LDPC decoders.

Margin Propagation based XOR-SAT Solvers for Decoding of LDPC Codes

TL;DR

This work reframes LDPC decoding as an XOR-SAT optimization problem and introduces a low-complexity solver based on Margin Propagation (MP). By constructing an XOR-SAT objective with a log-sum-exponential formulation and augmenting it with channel information through normalization, the MP-XOR-SAT decoder achieves soft-decision decoding without multipliers. The method demonstrates near-SPA performance across multiple LDPC code families while requiring far fewer iterations than gradient-based bit-flipping approaches, and it offers significant hardware benefits due to its multiplier-free computations. The results indicate a promising, hardware-friendly path for efficient LDPC decoding, with potential for analog or mixed-signal implementations and further optimization of hyper-parameters. Overall, the paper delivers a novel, fast, and low-complexity decoding strategy that narrows the gap to SPA in AWGN channels and informs future decoder design and hardware realizations.

Abstract

Decoding of Low-Density Parity Check (LDPC) codes can be viewed as a special case of XOR-SAT problems, for which low-computational complexity bit-flipping algorithms have been proposed in the literature. However, a performance gap exists between the bit-flipping LDPC decoding algorithms and the benchmark LDPC decoding algorithms, such as the Sum-Product Algorithm (SPA). In this paper, we propose an XOR-SAT solver using log-sum-exponential functions and demonstrate its advantages for LDPC decoding. This is then approximated using the Margin Propagation formulation to attain a low-complexity LDPC decoder. The proposed algorithm uses soft information to decide the bit-flips that maximize the number of parity check constraints satisfied over an optimization function. The proposed solver can achieve results that are within dB of the Sum-Product Algorithm for the same number of code iterations. It is also at least 10x lesser than other Gradient-Descent Bit Flipping decoding algorithms, which are also bit-flipping algorithms based on optimization functions. The approximation using the Margin Propagation formulation does not require any multipliers, resulting in significantly lower computational complexity than other soft-decision Bit-Flipping LDPC decoders.
Paper Structure (17 sections, 19 equations, 7 figures, 3 tables, 2 algorithms)

This paper contains 17 sections, 19 equations, 7 figures, 3 tables, 2 algorithms.

Figures (7)

  • Figure 1: XOR-SAT as an equivalent optimization problem illustrated for a 3-bit majority code:\ref{['concept_a']} The parity check constraints or XOR-clauses $C_1$ and $C_2$ corresponding to Boolean variables $u_1,u_2$ and $u_3$; \ref{['concept_b']} Three-dimensional lattice showing the location of the assignments that satisfy $C_1$ and $C_2$ and hence represent valid codewords; \ref{['concept_c']} XOR-SAT or decoding as a continuous optimization problem where the global maxima correspond the solution or valid codewords.
  • Figure 2: Flow-chart showing key steps involved in the design of the MP-XOR-SAT based LDPC decoder.
  • Figure 3: An example is illustrated using the 3-bit majority code. The evolution of the bits is explained over $5$ iterations, with $d_j$ being the decision bit and $q_j$ being the soft information. \ref{['eg_3bit_j1']} Dynamics of $d_1$, corresponding to the changes in $q_1$; \ref{['eg_3bit_j2']} Dynamics of $d_2$ due to the changes in $q_2$, which do not change because they do not satisfy the threshold condition; \ref{['eg_3bit_j3']} Dynamics of $d_3$ corresponding to the updates in $q_3$. \ref{['eg_3bit_constraint']} The number of constraints satisfied over each iteration. The $0^{th}$ iteration refers to the initial condition before the iterative algorithm is initiated.
  • Figure 4: An illustration depicting the effect of the normalization factor for a $(32,8)$ regular LDPC code for different cases with and without the normalization: \ref{['no_reinit']} The number of constraints satisfied with respect to the iterations without normalization for $10$ random codewords at $1dB$ noise; \ref{['with_re_init']} The number of constraints satisfied with respect to the iterations, with the normalization factor for the same $10$ noisy words in Fig. \ref{['no_reinit']}; \ref{['ber_re_init']} Bit Error Rate (BER) and Frame Error Rate (FER) with and without the normalization. Percentage of 'match', 'valid-mismatch' and 'invalid' cases for different noise values: \ref{['reinit_with_50']} with the normalization factor and $I_{max}=50$; \ref{['reinit_wo_50']} without the normalization factor and $I_{max}=50$ iterations; \ref{['reinit_wo_1000']} without the normalization factor and $I_{max}=1000$.
  • Figure 5: An illustration showing the effect of single and multi-state bit flipping algorithm: \ref{['single']} A case with a single state being flipped for $10$ random codewords at $1dB$ noise; \ref{['multi']} A case with multiple states being flipped for the same $10$ noisy words in Fig. \ref{['single']}; \ref{['ber_single_multi']} Bit Error Rate (BER) and Frame Error Rate (FER) with single bit flip ($I_{max} = 500$) and multiple flips per iteration ($I_{max} = 10$).
  • ...and 2 more figures