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Embedding Hardware Approximations in Discrete Genetic-based Training for Printed MLPs

Florentia Afentaki, Michael Hefenbrock, Georgios Zervakis, Mehdi B. Tahoori

TL;DR

This paper proposes and implements a genetic-based, approximate, hardware-aware training approach specifically designed for printed MLPs, and achieves over 5 × area and power reduction compared to the baseline while outperforming state-of-the-art approximate and stochastic printed MLPs.

Abstract

Printed Electronics (PE) stands out as a promisingtechnology for widespread computing due to its distinct attributes, such as low costs and flexible manufacturing. Unlike traditional silicon-based technologies, PE enables stretchable, conformal,and non-toxic hardware. However, PE are constrained by larger feature sizes, making it challenging to implement complex circuits such as machine learning (ML) classifiers. Approximate computing has been proven to reduce the hardware cost of ML circuits such as Multilayer Perceptrons (MLPs). In this paper, we maximize the benefits of approximate computing by integrating hardware approximation into the MLP training process. Due to the discrete nature of hardware approximation, we propose and implement a genetic-based, approximate, hardware-aware training approach specifically designed for printed MLPs. For a 5% accuracy loss, our MLPs achieve over 5x area and power reduction compared to the baseline while outperforming state of-the-art approximate and stochastic printed MLPs.

Embedding Hardware Approximations in Discrete Genetic-based Training for Printed MLPs

TL;DR

This paper proposes and implements a genetic-based, approximate, hardware-aware training approach specifically designed for printed MLPs, and achieves over 5 × area and power reduction compared to the baseline while outperforming state-of-the-art approximate and stochastic printed MLPs.

Abstract

Printed Electronics (PE) stands out as a promisingtechnology for widespread computing due to its distinct attributes, such as low costs and flexible manufacturing. Unlike traditional silicon-based technologies, PE enables stretchable, conformal,and non-toxic hardware. However, PE are constrained by larger feature sizes, making it challenging to implement complex circuits such as machine learning (ML) classifiers. Approximate computing has been proven to reduce the hardware cost of ML circuits such as Multilayer Perceptrons (MLPs). In this paper, we maximize the benefits of approximate computing by integrating hardware approximation into the MLP training process. Due to the discrete nature of hardware approximation, we propose and implement a genetic-based, approximate, hardware-aware training approach specifically designed for printed MLPs. For a 5% accuracy loss, our MLPs achieve over 5x area and power reduction compared to the baseline while outperforming state of-the-art approximate and stochastic printed MLPs.
Paper Structure (15 sections, 4 equations, 5 figures, 3 tables)

This paper contains 15 sections, 4 equations, 5 figures, 3 tables.

Table of Contents

  1. Introduction
  2. Background on Printed Electronics
  3. Approximate Computing Techniques
  4. Mutliplier Approximation
  5. Adder approximation
  6. Approximate Neuron
  7. Proposed Framework
  8. Hardware-Aware Training Flow
  9. Formulation and Encoding of the Approximate Neuron
  10. Results and Evaluation
  11. Experimental Setup
  12. Comparison Against the Baseline and State of the Art
  13. Printed-Battery Power Operation
  14. Execution Time Evaluation
  15. Conclusion

Figures (5)

  • Figure 1: Showcase of the approximate neuron. The figure on the left and right present the bespoke neuron before and after the hardware approximations.
  • Figure 2: Abstract high-level overview of our proposed framework.
  • Figure 3: Chromosome encoding and neuron construction.
  • Figure 4: (a) Area and (b) power reduction delivered by our printed MLPs and the state-of-the-art approximate Armeniakos:TCAD2023:crossArmeniakos:TC2023:codesign and stochastic Weller:2021:printed_stoch ones. Area and power are normalized w.r.t. the baseline exact MLPs Mubarik:MICRO:2020:printedml. Y-axis is in logarithmic scale.
  • Figure 5: Feasibility evaluation. Categorizing our printed MLPs, the baseline Mubarik:MICRO:2020:printedml and the approximate Armeniakos:TC2023:codesign ones based on their sustainability concerning area overhead and the availability of printed power sources.