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On the Hardness of Short and Sign-Compatible Circuit Walks

Steffen Borgwardt, Weston Grewe, Sean Kafer, Jon Lee, Laura Sanità

TL;DR

It is proved that for a pair of vertices of a $0/1$-network-flow polytope, it is NP-complete to determine the length of a shortest circuit walk, even if the authors add the requirement that the walk must be sign-compatible.

Abstract

The circuits of a polyhedron are a superset of its edge directions. Circuit walks, a sequence of steps along circuits, generalize edge walks and are "short" if they have few steps or small total length. Both interpretations of short are relevant to the theory and application of linear programming. We study the hardness of several problems relating to the construction of short circuit walks. We establish that for a pair of vertices of a $0/1$-network-flow polytope, it is NP-complete to determine the length of a shortest circuit walk, even if we add the requirement that the walk must be sign-compatible. Our results also imply that determining the minimal number of circuits needed for a sign-compatible decomposition is NP-complete. Further, we show that it is NP-complete to determine the smallest total length (for $p$-norms $\lVert \cdot \rVert_p$, $1 < p \leq \infty$) of a circuit walk between a pair of vertices. One method to construct a short circuit walk is to pick up a correct facet at each step, which generalizes a non-revisiting walk. We prove that it is NP-complete to determine if there is a circuit direction that picks up a correct facet; in contrast, this problem can be solved in polynomial time for TU polyhedra.

On the Hardness of Short and Sign-Compatible Circuit Walks

TL;DR

It is proved that for a pair of vertices of a -network-flow polytope, it is NP-complete to determine the length of a shortest circuit walk, even if the authors add the requirement that the walk must be sign-compatible.

Abstract

The circuits of a polyhedron are a superset of its edge directions. Circuit walks, a sequence of steps along circuits, generalize edge walks and are "short" if they have few steps or small total length. Both interpretations of short are relevant to the theory and application of linear programming. We study the hardness of several problems relating to the construction of short circuit walks. We establish that for a pair of vertices of a -network-flow polytope, it is NP-complete to determine the length of a shortest circuit walk, even if we add the requirement that the walk must be sign-compatible. Our results also imply that determining the minimal number of circuits needed for a sign-compatible decomposition is NP-complete. Further, we show that it is NP-complete to determine the smallest total length (for -norms , ) of a circuit walk between a pair of vertices. One method to construct a short circuit walk is to pick up a correct facet at each step, which generalizes a non-revisiting walk. We prove that it is NP-complete to determine if there is a circuit direction that picks up a correct facet; in contrast, this problem can be solved in polynomial time for TU polyhedra.
Paper Structure (19 sections, 28 theorems, 23 equations, 6 figures)

This paper contains 19 sections, 28 theorems, 23 equations, 6 figures.

Key Result

Theorem 1

Let $G$ be an Eulerian digraph where each node has in-degree and out-degree $2$. Let $P$ be the $0/1$-circulation polytope on $G$, let $\mathbf{0} \in P$ be the zero flow, and let ${\hbox{\boldmath$\bf x$}} \in P$ be the full flow. The circuit distance from $\mathbf{0}$ to ${\hbox{\boldmath$\bf x$}}

Figures (6)

  • Figure 1: A polytope $P$ with two vertices ${\hbox{\boldmath$\bf x$}}, {\hbox{\boldmath$\bf y$}}$ (left). The 'narrow corridor' of sign-compatible circuit decompositions of ${\hbox{\boldmath$\bf u$}} = {\hbox{\boldmath$\bf y$}} - {\hbox{\boldmath$\bf x$}}$ (right).
  • Figure 2: Construction of a residual network. Original network (left), feasible flow (center) and residual network (right).
  • Figure 3: Eulerian Digraph (left) decomposed into two edge-disjoint, Hamiltonian cycles (center and right). Each cycle corresponds to a circuit.
  • Figure 4: Polytope with a yes-solution to Incident-Facet-Step and a no-solution to SCM-Step. The red vector indicates a circuit step at ${\hbox{\boldmath$\bf x$}}$ which intersects a facet incident to ${\hbox{\boldmath$\bf y$}}$.
  • Figure 5: Construction of the auxiliary graph $H$ (right) from a digraph $D$ (left) for the proof of \ref{['thm:facet_step_hard']}.
  • ...and 1 more figures

Theorems & Definitions (53)

  • Definition 1: Circuits
  • Definition 2
  • Theorem 1
  • Theorem 2
  • Theorem 3
  • Theorem 4
  • Theorem 5
  • Proposition 1
  • Theorem 1
  • proof
  • ...and 43 more