Optimizing T and CNOT Gates in Quantum Ripple-Carry Adders and Comparators

TL;DR

The paper analyzes ripple-carry quantum adders and comparators implemented in the Clifford+$\mathsf{T}$ gate set, emphasizing resource metrics that matter for fault-tolerant quantum computation. It introduces optimization rules via Toffoli-Peres and Toffoli-Toffoli V-shaped circuits and applies them to Cuccaro and Takahashi adders, achieving a $\mathsf{T}$-depth of $3n+O(1)$ and a $\mathsf{CNOT}$-depth of $8n+O(1)$ for shallow adders, with ancilla-free variants maintaining similar $\mathsf{T}$ performance. The study extends these optimizations to ripple-carry comparators, obtaining improved $\mathsf{T}$- and $\mathsf{CNOT}$-depths and counts across multiple circuit variants, including ancilla-free implementations. Together, the results provide concrete, scalable blueprints for space- and depth-efficient quantum arithmetic in near-term architectures, while highlighting remaining trade-offs between $\mathsf{T}$ and $\mathsf{CNOT}$ resources.

Abstract

The state of the art of quantum circuits using the ripple-carry strategy for the addition and comparison of two n-bit numbers is presented, as well as optimizations in the Clifford+T gate set, both in terms of CNOT-depth and T-depth, or CNOT-count and T-count. In particular, we consider the adders presented by Cuccaro et al. and Takahashi et al., and exhibit an adder with a T-depth of 3n and a CNOT-depth of 8n, while without optimization of the original circuits, a T-depth of 6n is expected. Note that we have focused here on quantum ripple-carry adders using at most one ancilla, without any approximation of the 3-qubit gates involved (Toffoli, Peres and TR) or any strategy involving a measurement.

Figures (11)

• Figure 1: (a) Symbol for the Peres gate. (b) Symbol for the TR gate. (c) Symbol for the Toffoli gate and relations with the previous gates.
• Figure 2: (a) Decomposition of the Peres gate with 5 $\mathsf{CNOT}$ gates but a $\mathsf{T}$-depth of 4. (b) Decomposition of the Toffoli gate with a $\mathsf{T}$-depth of 3 and 7 $\mathsf{CNOT}$ gates.
• Figure 3: Left cascade of two Toffoli gates. Its $\mathsf{T}$-depth is 5, $\mathsf{T}$-count is 14, $\mathsf{CNOT}$-depth is 11, and $\mathsf{CNOT}$-count is 14.
• Figure 4: Right cascade of two Peres gates. Its $\mathsf{T}$-depth is 5, $\mathsf{T}$-count is 14, $\mathsf{CNOT}$-depth is 9, and $\mathsf{CNOT}$-count is 10.
• Figure 5: V-shaped circuit with Toffoli gates on the left-hand branch and Peres gates on the right-hand one. The color filled gates from \ref{['circ:ToffoliLeft']} and \ref{['circ:PeresRight']} cancel.