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Generating Shuttling Procedures for Constrained Silicon Quantum Dot Array

Naoto Sato, Tomonori Sekiguchi, Takeru Utsugi, Hiroyuki Mizuno

TL;DR

This work tackles compiling quantum circuits for a constrained silicon quantum dot array (SQDA) by introducing a formal state-transition model M that captures the array topology, shared gate constraints, and electron shuttling rules. It then defines six constructive conditions to guarantee reachability from ready states to independently executable operation states and back, enabling practical extraction of complete operation procedures for arbitrary circuits. The authors implement concrete 16×8 SQDA instances, develop two quantum compilers, and demonstrate that feasible procedures can be generated in reasonable time, with shuttling-based crosstalk avoidance yielding higher fidelity than non-evacuated alternatives under realistic fidelities. Overall, this approach provides a principled pathway to scalable, crosstalk-robust quantum control in silicon quantum-dot architectures, with clear routes for optimization and extension to larger devices or algorithm-specific M designs.

Abstract

In silicon quantum computers, a single electron is trapped in a microstructure called a quantum dot, and its spin is used as a qubit. For large-scale integration of qubits, we previously proposed an approach of arranging the quantum dots in a two-dimensional array and sharing a control gate in a row or column of the array. In our array, the shuttling of electrons is a useful technique to operate the target qubit independently and avoid crosstalk. However, since the shuttling is also conducted using shared control gates, the movement of qubits is complexly constrained. We therefore propose a formal model on the basis of state transition systems to describe those constraints and operation procedures on the array. We also present an approach to generate operation procedures under the constraints. Utilizing this approach, we present a concrete method for our 16 $\times$ 8 quantum dot array. By implementing the proposed method as a quantum compiler, we confirmed that it is possible to generate operation procedures in a practical amount of time for arbitrary quantum circuits. We also demonstrated that crosstalk can be avoided by shuttling and that the fidelity in that case is higher than when crosstalk is not avoided.

Generating Shuttling Procedures for Constrained Silicon Quantum Dot Array

TL;DR

This work tackles compiling quantum circuits for a constrained silicon quantum dot array (SQDA) by introducing a formal state-transition model M that captures the array topology, shared gate constraints, and electron shuttling rules. It then defines six constructive conditions to guarantee reachability from ready states to independently executable operation states and back, enabling practical extraction of complete operation procedures for arbitrary circuits. The authors implement concrete 16×8 SQDA instances, develop two quantum compilers, and demonstrate that feasible procedures can be generated in reasonable time, with shuttling-based crosstalk avoidance yielding higher fidelity than non-evacuated alternatives under realistic fidelities. Overall, this approach provides a principled pathway to scalable, crosstalk-robust quantum control in silicon quantum-dot architectures, with clear routes for optimization and extension to larger devices or algorithm-specific M designs.

Abstract

In silicon quantum computers, a single electron is trapped in a microstructure called a quantum dot, and its spin is used as a qubit. For large-scale integration of qubits, we previously proposed an approach of arranging the quantum dots in a two-dimensional array and sharing a control gate in a row or column of the array. In our array, the shuttling of electrons is a useful technique to operate the target qubit independently and avoid crosstalk. However, since the shuttling is also conducted using shared control gates, the movement of qubits is complexly constrained. We therefore propose a formal model on the basis of state transition systems to describe those constraints and operation procedures on the array. We also present an approach to generate operation procedures under the constraints. Utilizing this approach, we present a concrete method for our 16 8 quantum dot array. By implementing the proposed method as a quantum compiler, we confirmed that it is possible to generate operation procedures in a practical amount of time for arbitrary quantum circuits. We also demonstrated that crosstalk can be avoided by shuttling and that the fidelity in that case is higher than when crosstalk is not avoided.
Paper Structure (30 sections, 40 equations, 39 figures, 1 algorithm)

This paper contains 30 sections, 40 equations, 39 figures, 1 algorithm.

Figures (39)

  • Figure 1: Quantum circuit to generate the Bell state
  • Figure 2: Structure of quantum dot array
  • Figure 3: Example of row-shared control gates
  • Figure 4: Single-qubit gate operation
  • Figure 5: Crosstalk of single-qubit gate operation
  • ...and 34 more figures