SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model

TL;DR

This work investigates automating the development and evaluation of IC architecture specifications using large language models. By defining architecture-specification levels (HAS, MAS, LAS) and assembling a ~46-item dataset, the study demonstrates LLM-assisted generation (from briefs or RTL-to-spec conversions) and LLM-based review (defect-focused feedback) as feasible approaches. Results show LLMs can generate coherent specifications for simpler designs and provide valuable, if imperfect, review feedback, with section-wise workflows mitigating boundary and accuracy issues. The findings suggest substantial potential to reduce human effort and improve consistency in chip design documentation, while acknowledging areas for evaluation, standardization, and future model-training to enhance reliability.

Abstract

The development of architecture specifications is an initial and fundamental stage of the integrated circuit (IC) design process. Traditionally, architecture specifications are crafted by experienced chip architects, a process that is not only time-consuming but also error-prone. Mistakes in these specifications may significantly affect subsequent stages of chip design. Despite the presence of advanced electronic design automation (EDA) tools, effective solutions to these specification-related challenges remain scarce. Since writing architecture specifications is naturally a natural language processing (NLP) task, this paper pioneers the automation of architecture specification development with the advanced capabilities of large language models (LLMs). Leveraging our definition and dataset, we explore the application of LLMs in two key aspects of architecture specification development: (1) Generating architecture specifications, which includes both writing specifications from scratch and converting RTL code into detailed specifications. (2) Reviewing existing architecture specifications. We got promising results indicating that LLMs may revolutionize how these critical specification documents are developed in IC design nowadays. By reducing the effort required, LLMs open up new possibilities for efficiency and accuracy in this crucial aspect of chip design.

Figures (11)

• Figure 1: The overall structure of this paper. We first propose basic definitions and an organized dataset dedicated to architecture specifications. Leveraging them, we explore the use of LLMs in the generation and review of architecture specifications.
• Figure 2: An example prompt to initiate generating LAS. This generation is based on the designers' brief description.
• Figure 3: An example prompt to request GPT generating an architecture specification for perpetual calendar. The response is shown in Figure \ref{['fig:writeResp']}.
• Figure 4: A GPT response example to the prompt in Figure \ref{['fig:detailedWrite']}.
• Figure 5: An example prompt to initiate writing architecture specifications on the basis of RTL code. The response is shown in Figure \ref{['fig:detailedWrite2']}.