LLM4EDA: Emerging Progress in Large Language Models for Electronic Design Automation

TL;DR

The paper addresses the rising complexity of chip design and the need for automated EDA support by examining how Large Language Models can be integrated into EDA workflows. It categorizes applications into assistant chatbots, HDL/script generation, and HDL verification/analysis, and discusses datasets, backbones, and practical evaluation strategies. Key contributions include a structured taxonomy of LLM4EDA applications, survey of representative systems (e.g., ChipNeMo, ChatEDA, RTLFixer), and a roadmap highlighting logic synthesis, physical design, multi-modal content alignment, and long-chain PPA feedback. The work points to a practical path for leveraging LLMs to accelerate EDA while addressing hallucination, ensuring design correctness, and enabling scalable, cross-stage automation with multi-modal data.

Abstract

Driven by Moore's Law, the complexity and scale of modern chip design are increasing rapidly. Electronic Design Automation (EDA) has been widely applied to address the challenges encountered in the full chip design process. However, the evolution of very large-scale integrated circuits has made chip design time-consuming and resource-intensive, requiring substantial prior expert knowledge. Additionally, intermediate human control activities are crucial for seeking optimal solutions. In system design stage, circuits are usually represented with Hardware Description Language (HDL) as a textual format. Recently, Large Language Models (LLMs) have demonstrated their capability in context understanding, logic reasoning and answer generation. Since circuit can be represented with HDL in a textual format, it is reasonable to question whether LLMs can be leveraged in the EDA field to achieve fully automated chip design and generate circuits with improved power, performance, and area (PPA). In this paper, we present a systematic study on the application of LLMs in the EDA field, categorizing it into the following cases: 1) assistant chatbot, 2) HDL and script generation, and 3) HDL verification and analysis. Additionally, we highlight the future research direction, focusing on applying LLMs in logic synthesis, physical design, multi-modal feature extraction and alignment of circuits. We collect relevant papers up-to-date in this field via the following link: https://github.com/Thinklab-SJTU/Awesome-LLM4EDA.

Figures (4)

• Figure 1: Three categories in terms of progress and application in Large Language Models for Electronic Design Automation (LLM4EDA).
• Figure 2: The typical flow of digital chip design.
• Figure 3: The flow driven by large circuit model.
• Figure 4: Research Tree of Large Language Models for Electronic Design Automation.