Photonics for Sustainable Computing

TL;DR

This work develops a carbon footprint framework for photonic chips that accounts for both operational and embodied emissions, enabling lifecycle assessments of photonics-based ML accelerators. Using an ACT-style decomposition and IMEC-derived process data, the authors apply the framework to the ADEPT electro-photonic accelerator and show a 2.19× lower total carbon footprint and a 14.58% reduction in embodied carbon for one million inferences versus CMOS systolic arrays, despite larger area. They demonstrate a substantial per-area embodied-carbon advantage for photonics (approximately 4.1× lower than 28 nm CMOS) and emphasize that photonics can be sustainable when designed with lifecycle considerations in mind. The study highlights the need for detailed fabrication data and carbon-aware design, advocating co-design strategies and platform choices to maximize environmental benefits of photonic computing.

Abstract

Photonic integrated circuits are finding use in a variety of applications including optical transceivers, LIDAR, bio-sensing, photonic quantum computing, and Machine Learning (ML). In particular, with the exponentially increasing sizes of ML models, photonics-based accelerators are getting special attention as a sustainable solution because they can perform ML inferences with multiple orders of magnitude higher energy efficiency than CMOS-based accelerators. However, recent studies have shown that hardware manufacturing and infrastructure contribute significantly to the carbon footprint of computing devices, even surpassing the emissions generated during their use. For example, the manufacturing process accounts for 74% of the total carbon emissions from Apple in 2019. This prompts us to ask -- if we consider both the embodied (manufacturing) and operational carbon cost of photonics, is it indeed a viable avenue for a sustainable future? So, in this paper, we build a carbon footprint model for photonic chips and investigate the sustainability of photonics-based accelerators by conducting a case study on ADEPT, a photonics-based accelerator for deep neural network inference. Our analysis shows that photonics can reduce both operational and embodied carbon footprints with its high energy efficiency and at least 4$\times$ less fabrication carbon cost per unit area than 28 nm CMOS.

Figures (5)

• Figure 1: Overview of the carbon footprint of a chip.
• Figure 2: Cross-section of a photonic chip adapted from AIM Photonics multi-project wafer technology fahrenkopf2019aim.
• Figure 3: Comparison of EPA (left) and yield for different defect densities ($cm^{-2}$) (right) of photonics (PH) and CMOS (EL) chips.
• Figure 4: Breakdown of ADEPT's carbon footprint for one million inferences (amortized embodied carbon).
• Figure 5: Comparison of the carbon footprint of ADEPT (one 128$\times$128 core at 10 GHz) and equivalent Systolic-Arrays (SA) (10 128$\times$128 cores at 1 GHz) for one million inferences (amortized embodied carbon). SA's carbon footprint is 2.19$\times$ higher than ADEPT on average. Photonics wins in both operational and embodied carbon efficiency.