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RHS-TRNG: A Resilient High-Speed True Random Number Generator Based on STT-MTJ Device

Siqing Fu, Tiejun Li, Chunyuan Zhang, Hanqing Li, Sheng Ma, Jianmin Zhang, Ruiyi Zhang, Lizhou Wu

TL;DR

This work tackles the need for high-throughput, reliable true random numbers integrated into computing systems. It introduces RHS-TRNG, a two-phase, STT-MTJ-based TRNG that uses bidirectional switching currents and dual generator units to achieve up to $303\,\mathrm{Mb/s}$ per cell, while avoiding reset currents to extend device lifetime. The authors demonstrate circuit-level feasibility (SPICE/Verilog-A in 45 nm) and system-level impact by embedding a custom RISC-V accelerator with rand/frand instructions, achieving $3.4$–$12\times$ speedups on Monte Carlo option pricing versus software RNGs. The results show strong resilience to voltage, process, and temperature variations and scalable throughput via cell-level parallelism, highlighting the potential of spintronic devices for post-M Moore computing. Overall, RHS-TRNG combines circuit innovations and software integration to deliver high-quality randomness with substantial performance gains for cryptography, finance, and stochastic simulations, signaling a viable path for spintronics-enabled RNGs in modern architectures.

Abstract

High-quality random numbers are very critical to many fields such as cryptography, finance, and scientific simulation, which calls for the design of reliable true random number generators (TRNGs). Limited by entropy source, throughput, reliability, and system integration, existing TRNG designs are difficult to be deployed in real computing systems to greatly accelerate target applications. This study proposes a TRNG circuit named RHS-TRNG based on spin-transfer torque magnetic tunnel junction (STT-MTJ). RHS-TRNG generates resilient and high-speed random bit sequences exploiting the stochastic switching characteristics of STT-MTJ. By circuit/system co-design, we integrate RHS-TRNG into a RISC-V processor as an acceleration component, which is driven by customized random number generation instructions. Our experimental results show that a single cell of RHS-TRNG has a random bit generation speed of up to 303 Mb/s, which is the highest among existing MTJ-based TRNGs. Higher throughput can be achieved by exploiting cell-level parallelism. RHS-TRNG also shows strong resilience against PVT variations thanks to our designs using bidirectional switching currents and dual generator units. In addition, our system evaluation results using gem5 simulator suggest that the system equipped with RHS-TRNG can achieve 3.4-12x higher performance in speeding up option pricing programs than software implementations of random number generation.

RHS-TRNG: A Resilient High-Speed True Random Number Generator Based on STT-MTJ Device

TL;DR

This work tackles the need for high-throughput, reliable true random numbers integrated into computing systems. It introduces RHS-TRNG, a two-phase, STT-MTJ-based TRNG that uses bidirectional switching currents and dual generator units to achieve up to per cell, while avoiding reset currents to extend device lifetime. The authors demonstrate circuit-level feasibility (SPICE/Verilog-A in 45 nm) and system-level impact by embedding a custom RISC-V accelerator with rand/frand instructions, achieving speedups on Monte Carlo option pricing versus software RNGs. The results show strong resilience to voltage, process, and temperature variations and scalable throughput via cell-level parallelism, highlighting the potential of spintronic devices for post-M Moore computing. Overall, RHS-TRNG combines circuit innovations and software integration to deliver high-quality randomness with substantial performance gains for cryptography, finance, and stochastic simulations, signaling a viable path for spintronics-enabled RNGs in modern architectures.

Abstract

High-quality random numbers are very critical to many fields such as cryptography, finance, and scientific simulation, which calls for the design of reliable true random number generators (TRNGs). Limited by entropy source, throughput, reliability, and system integration, existing TRNG designs are difficult to be deployed in real computing systems to greatly accelerate target applications. This study proposes a TRNG circuit named RHS-TRNG based on spin-transfer torque magnetic tunnel junction (STT-MTJ). RHS-TRNG generates resilient and high-speed random bit sequences exploiting the stochastic switching characteristics of STT-MTJ. By circuit/system co-design, we integrate RHS-TRNG into a RISC-V processor as an acceleration component, which is driven by customized random number generation instructions. Our experimental results show that a single cell of RHS-TRNG has a random bit generation speed of up to 303 Mb/s, which is the highest among existing MTJ-based TRNGs. Higher throughput can be achieved by exploiting cell-level parallelism. RHS-TRNG also shows strong resilience against PVT variations thanks to our designs using bidirectional switching currents and dual generator units. In addition, our system evaluation results using gem5 simulator suggest that the system equipped with RHS-TRNG can achieve 3.4-12x higher performance in speeding up option pricing programs than software implementations of random number generation.
Paper Structure (34 sections, 5 equations, 22 figures, 5 tables)

This paper contains 34 sections, 5 equations, 22 figures, 5 tables.

Figures (22)

  • Figure 1: Perpendicular MTJ device: (a) structure schematic and (b) cross-sectional TEM image.
  • Figure 2: (a) STT-MTJ's bipolar switching method between AP and P states. (b) Stochastic switching process to either "0" or "1" due to thermal perturbation.
  • Figure 3: The AP$\rightarrow$P switching probability of STT-MTJ under different write current and pulse width.
  • Figure 4: MTJ-based TRNG design with three phases: reset, write and read.
  • Figure 5: RHS-TRNG with one cycle consisting of two phases: read and write.
  • ...and 17 more figures