An event-driven link-level simulator for validation of AFDX and Ethernet avionics networks

TL;DR

The paper presents an event-driven, link-level simulator for avionics networks that supports ARINC 664 Part 7 (AFDX) and Ethernet with static routing, enabling early verification with realistic device models. It combines a Matlab/Simulink implementation with end-system and switch models, plus TSN-aware considerations, to produce delay, jitter, throughput, and switch-capacity metrics. Validation against analytical worst-case delays and a performance study on a realistic Airbus-like topology demonstrate accuracy and linear scalability with the number of messages, supporting timely evaluation of real networks. The work aims to accelerate avionics design verification and integration into validation frameworks, with future plans for standard-compliance extensions and automated validation pipelines.

Abstract

Aircraft are composed of many electronic systems: sensors, displays, navigation equipment and communication elements. These elements require a reliable interconnection, which is a major challenge for communication networks as high reliability and predictability requirements must be verified for safe operation. In addition, their verification via hardware deployments is limited because these are costly and make difficult to try different architectures and configurations, thus delaying the design and development in this area. Therefore, verification at early stages in the design process is of great importance and must be supported by simulation. In this context, this work presents an event-driven link level framework and simulator for the validation of avionics networks. The presented tool supports communication protocols such as Avionics Full-Duplex Switched Ethernet (AFDX), which is a common protocol in avionics, as well as Ethernet, used with static routing. Alsa, accurate results are facilitated by the simulator through the utilization of realistic models for the different devices. The proposed platform is evaluated in Clean Sky's Disruptive Cockpit for Large Passenger Aircraft architecture scenario showing capabilities of the simulator. The speed of the verification is a key factor in its application, so the computational cost is analysed, proving that the execution time is linearly dependent on the number of messages sent.

Figures (10)

• Figure S1: Systems engineering V-model.
• Figure S2: Traffic regulation in through .
• Figure S3: ES model in the simulator.
• Figure S4: Switch logical model in the simulator.
• Figure S5: Architecture of the switch's memory.