QRCC: Evaluating Large Quantum Circuits on Small Quantum Computers through Integrated Qubit Reuse and Circuit Cutting

TL;DR

QRCC tackles the challenge of running large quantum circuits on small quantum computers in the NISQ era by integrating wire cutting, gate cutting, and qubit reuse into a single framework. It formulates the cutting decision as an ILP problem on a QR-aware DAG, balancing the classical post-processing overhead with circuit fidelity through a linearized objective and meta-parameters. The approach reduces the number of cuts significantly on benchmarks (average reductions around 29% with wire-cut only, up to 44% when including gate cuts) and demonstrates improved fidelity and practical viability through real-device experiments and a detailed scalability study. This work provides a scalable, end-to-end methodology for deploying large quantum circuits on resource-constrained hardware, with broad implications for near-term quantum applications and circuit design strategies. The framework's use of qubit reuse to amplify cutting opportunities suggests a practical path toward more faithful quantum computations on existing devices.

Abstract

Quantum computing has recently emerged as a promising computing paradigm for many application domains. However, the size of quantum circuits that can be run with high fidelity is constrained by the limited quantity and quality of physical qubits. Recently proposed schemes, such as wire cutting and qubit reuse, mitigate the problem but produce sub-optimal results as they address the problem individually. In addition, gate cutting, an alternative circuit-cutting strategy that is suitable for circuits computing expectation values, has not been fully explored in the field. In this paper, we propose QRCC, an integrated approach that exploits qubit reuse and circuit-cutting (including wire cutting and gate cutting) to run large circuits on small quantum computers. Circuit-cutting techniques introduce non-negligible post-processing overhead, which increases exponentially with the number of cuts. QRCC exploits qubit reuse to find better cutting solutions to minimize the cut numbers and thus the post-processing overhead. Our evaluation results show that on average we reduce the number of cuts by 29% and additional reduction when considering gate cuts.

Figures (7)

• Figure 1: Circuit-cutting and qubit reuse. (a) An example of wire cutting is where qubit q$_1$ has been cut. It leaves measurement (M) and Initialization (I) operations in two subcircuits, respectively. (b) An example of Gate cut is where gate U3, acting on qubits q$_1$ and q$_2$ has been cut. It leaves two single-qubit gates in two subcircuits, respectively. (c) An example of qubit reuse. Once the U1 gate has finished executing, qubit q$_0$ can be measured and reused for logical qubit q$_2$.
• Figure 2: The integration of W-Cut, G-Cut, and qubit reuse helps to find better cutting solutions. (a) Original Circuit, showing three different cutting solutions. (b) The solution generated by CutQC. (c) The solution when integrating W-Cut and qubit reuse. (d) The solution when integrating W-Cut, G-Cut, and qubit reuse. ( M/ I indicate measurement and initialization, respectively, due to W-Cut; and U$_T$/ U$_B$ indicate the top/bottom single-qubit gates after applying G-Cut to a two-qubit gate U).
• Figure 3: A QR-aware DAG representation of the quantum circuit. (Dashed boxes indicate identity gates. Each wire segment may potentially be W-Cut, and each two-qubit gate may be potentially G-Cut.)
• Figure 4: The reconstruction of the expectation value after W-Cut and G-Cut.
• Figure 5: Correlating varying $\delta$ values with #cuts and #MS. The left y-axis represents the #cuts, normalized to that when $\delta$=1. The right y-axis represents the #MS, normalized to the size of the original circuits.