Logo
ScienceStack
Table of Contents
Fetching ...
Sign In

Ellora: Exploring Low-Power OFDM-based Radar Processors using Approximate Computing

Rajat Bhattacharjya, Alish Kanani, A Anil Kumar, Manoj Nambiar, M Girish Chandra, Rekha Singhal

TL;DR

The paper tackles the high power and area demands of OFDM-based joint radar-communication systems at edge devices. It introduces Ellora, a design-space exploration framework that injects approximate adders/multipliers into the end-to-end OFDM radar pipeline, focusing on the periodogram-based estimation block and centered around a fully parallel $512$-point IFFT core. Across hardware-software experiments, Ellora achieves an average accuracy loss of $0.063\%$ in positive-SNR scenarios while delivering up to $44.4\%$ power savings and $28.83\%$ area savings, identifying design points that meet user-specified quality constraints. The approach provides a practical methodology for deriving energy-efficient radar processors and can be integrated with additional optimization methods to advance edge-device JRC deployments.

Abstract

In recent times, orthogonal frequency-division multiplexing (OFDM)-based radar has gained wide acceptance given its applicability in joint radar-communication systems. However, realizing such a system on hardware poses a huge area and power bottleneck given its complexity. Therefore it has become ever-important to explore low-power OFDM-based radar processors in order to realize energy-efficient joint radar-communication systems targeting edge devices. This paper aims to address the aforementioned challenges by exploiting approximations on hardware for early design space exploration (DSE) of trade-offs between accuracy, area and power. We present Ellora, a DSE framework for incorporating approximations in an OFDM radar processing pipeline. Ellora uses pairs of approximate adders and multipliers to explore design points realizing energy-efficient radar processors. Particularly, we incorporate approximations into the block involving periodogram based estimation and report area, power and accuracy levels. Experimental results show that at an average accuracy loss of 0.063% in the positive SNR region, we save 22.9% of on-chip area and 26.2% of power. Towards achieving the area and power statistics, we design a fully parallel Inverse Fast Fourier Transform (IFFT) core which acts as a part of periodogram based estimation and approximate the addition and multiplication operations in it. The aforementioned results show that Ellora can be used in an integrated way with various other optimization methods for generating low-power and energy-efficient radar processors.

Ellora: Exploring Low-Power OFDM-based Radar Processors using Approximate Computing

TL;DR

The paper tackles the high power and area demands of OFDM-based joint radar-communication systems at edge devices. It introduces Ellora, a design-space exploration framework that injects approximate adders/multipliers into the end-to-end OFDM radar pipeline, focusing on the periodogram-based estimation block and centered around a fully parallel -point IFFT core. Across hardware-software experiments, Ellora achieves an average accuracy loss of in positive-SNR scenarios while delivering up to power savings and area savings, identifying design points that meet user-specified quality constraints. The approach provides a practical methodology for deriving energy-efficient radar processors and can be integrated with additional optimization methods to advance edge-device JRC deployments.

Abstract

In recent times, orthogonal frequency-division multiplexing (OFDM)-based radar has gained wide acceptance given its applicability in joint radar-communication systems. However, realizing such a system on hardware poses a huge area and power bottleneck given its complexity. Therefore it has become ever-important to explore low-power OFDM-based radar processors in order to realize energy-efficient joint radar-communication systems targeting edge devices. This paper aims to address the aforementioned challenges by exploiting approximations on hardware for early design space exploration (DSE) of trade-offs between accuracy, area and power. We present Ellora, a DSE framework for incorporating approximations in an OFDM radar processing pipeline. Ellora uses pairs of approximate adders and multipliers to explore design points realizing energy-efficient radar processors. Particularly, we incorporate approximations into the block involving periodogram based estimation and report area, power and accuracy levels. Experimental results show that at an average accuracy loss of 0.063% in the positive SNR region, we save 22.9% of on-chip area and 26.2% of power. Towards achieving the area and power statistics, we design a fully parallel Inverse Fast Fourier Transform (IFFT) core which acts as a part of periodogram based estimation and approximate the addition and multiplication operations in it. The aforementioned results show that Ellora can be used in an integrated way with various other optimization methods for generating low-power and energy-efficient radar processors.
Paper Structure (10 sections, 1 equation, 8 figures, 1 table)

This paper contains 10 sections, 1 equation, 8 figures, 1 table.

Table of Contents

  1. Introduction
  2. Methodology
  3. Functional Validation
  4. Hardware Implementation
  5. Design Space Exploration
  6. Evaluation
  7. Accuracy Analysis
  8. Hardware Evaluation
  9. Design Space Exploration
  10. Conclusion and Future Work

Figures (8)

  • Figure 1: OFDM Radar processing pipeline. Approximated block highlighted in red.
  • Figure 2: Methodology of Ellora
  • Figure 3: IFFT Core Microarchitecture
  • Figure 4: Accuracy statistics of various adder-multiplier (accurate and approximate) pairs. Range averaged for 100 runs per SNR for each adder-multiplier pair.
  • Figure 5: Target's range profile at SNR= 5 dB with accurate adder and multiplier; and add16se_3BD-mul16s_HFB
  • ...and 3 more figures