COGNAC: Circuit Optimization via Gradients and Noise-Aware Compilation

TL;DR

COGNAC addresses the challenge of noisy, near-term quantum computation by uniting gradient-based optimization with noise-aware compilation. It parameterizes circuits, partitions them into three-qubit windows, optimizes rotation amplitudes under a differentiable, depolarizing-like noise model, and prunes near-zero gates to produce smaller, higher-fidelity circuits; all steps are GPU-accelerated via a TensorFlow-based L-BFGS workflow implemented as a Qiskit plugin. Its key contributions include a scalable, noise-aware optimizer that can outperform existing tools on hardware fidelity while maintaining competitive compilation times, demonstrated on IBM Torino hardware with MQT-Bench circuits. This approach broadens the design space for quantum compilers, offering a practical path to more faithful quantum executions in the NISQ era and paving the way for integration with other optimization strategies and hardware platforms.

Abstract

We present COGNAC, a novel strategy for compiling quantum circuits based on numerical optimization algorithms from scientific computing. Observing that shorter-duration "partially entangling" gates tend to be less noisy than the typical "maximally entangling" gates, we use a simple and versatile noise model to construct a differentiable cost function. Standard gradient-based optimization algorithms running on a GPU can then quickly converge to a local optimum that closely approximates the target unitary. By reducing rotation angles to zero, COGNAC removes gates from a circuit, producing smaller quantum circuits. We have implemented this technique as a general-purpose Qiskit compiler plugin and compared performance with state-of-the-art optimizers on a variety of standard benchmarks. Testing our compiled circuits on superconducting quantum hardware, we find that COGNAC's optimizations produce circuits that are substantially less noisy than those produced by existing optimizers. These runtime performance gains come without a major compile-time cost, as COGNAC's parallelism allows it to retain a competitive optimization speed.

Figures (10)

• Figure 1: A parameterized gate set
• Figure 2: Gates from the standard Clifford+T gate set
• Figure 3: COGNAC's overall workflow
• Figure 4: COGNAC optimization of an inefficient $R_{xx}(\pi/4)$ gate implementation
• Figure 5: A closer look at the initial gate translation step