Simple Linear-Size Additive Emulators
Gary Hoppenworth
TL;DR
This work targets the problem of constructing sparse additive emulators of $n$-vertex graphs with linear size, seeking the smallest possible additive error. It introduces a simple linear-size emulator based on a path-buying framework that leverages a BV16 clustering decomposition and a sampling-based quadratic-expansion argument, with recursive insertion of emulators on large clusters. The resulting emulator achieves an additive error of $+O(n^{1/(3+\sqrt{5})+\epsilon})$ (numerically about $n^{0.191+\epsilon}$) on $O_{\\epsilon}(n)$ edges, improving the previous $+O(n^{0.222})$ bound. This narrows the gap between known upper and lower bounds for linear-size additive emulators and demonstrates the efficacy of path-buying methods beyond traditional dense settings.
Abstract
Given an input graph $G = (V, E)$, an additive emulator $H = (V, E', w)$ is a sparse weighted graph that preserves all distances in $G$ with small additive error. A recent line of inquiry has sought to determine the best additive error achievable in the sparsest setting, when $H$ has a linear number of edges. In particular, the work of [Kogan and Parter, ICALP 2023], following [Pettie, ICALP 2007], constructed linear size emulators with $+O(n^{0.222})$ additive error. It is known that the worst-case additive error must be at least $+Ω(n^{2/29})$ due to [Lu, Vassilevska Williams, Wein, and Xu, SODA 2022]. We present a simple linear-size emulator construction that achieves additive error $+O(n^{0.191})$. Our approach extends the path-buying framework developed by [Baswana, Kavitha, Mehlhorn, and Pettie, SODA 2005] and [Vassilevska Williams and Bodwin, SODA 2016] to the setting of sparse additive emulators.
