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A Generalized Adjusted Min-Sum Decoder for 5G LDPC Codes: Algorithm and Implementation

Yuqing Ren, Hassan Harb, Yifei Shen, Alexios Balatsoukas-Stimming, Andreas Burg

TL;DR

This paper proposes an extension of adjusted min-sum decoding, called generalized adjusted min-sum (GA-MS) decoding, which flexibly truncates the incoming messages at the check node level and carefully approximates the non-linear functions of BP decoding to balance the error-rate and hardware complexity.

Abstract

5G New Radio (NR) has stringent demands on both performance and complexity for the design of low-density parity-check (LDPC) decoding algorithms and corresponding VLSI implementations. Furthermore, decoders must fully support the wide range of all 5G NR blocklengths and code rates, which is a significant challenge. In this paper, we present a high-performance and low-complexity LDPC decoder, tailor-made to fulfill the 5G requirements. First, to close the gap between belief propagation (BP) decoding and its approximations in hardware, we propose an extension of adjusted min-sum decoding, called generalized adjusted min-sum (GA-MS) decoding. This decoding algorithm flexibly truncates the incoming messages at the check node level and carefully approximates the non-linear functions of BP decoding to balance the error-rate and hardware complexity. Numerical results demonstrate that the proposed fixed-point GAMS has only a minor gap of 0.1 dB compared to floating-point BP under various scenarios of 5G standard specifications. Secondly, we present a fully reconfigurable 5G NR LDPC decoder implementation based on GA-MS decoding. Given that memory occupies a substantial portion of the decoder area, we adopt multiple data compression and approximation techniques to reduce 42.2% of the memory overhead. The corresponding 28nm FD-SOI ASIC decoder has a core area of 1.823 mm2 and operates at 895 MHz. It is compatible with all 5G NR LDPC codes and achieves a peak throughput of 24.42 Gbps and a maximum area efficiency of 13.40 Gbps/mm2 at 4 decoding iterations.

A Generalized Adjusted Min-Sum Decoder for 5G LDPC Codes: Algorithm and Implementation

TL;DR

This paper proposes an extension of adjusted min-sum decoding, called generalized adjusted min-sum (GA-MS) decoding, which flexibly truncates the incoming messages at the check node level and carefully approximates the non-linear functions of BP decoding to balance the error-rate and hardware complexity.

Abstract

5G New Radio (NR) has stringent demands on both performance and complexity for the design of low-density parity-check (LDPC) decoding algorithms and corresponding VLSI implementations. Furthermore, decoders must fully support the wide range of all 5G NR blocklengths and code rates, which is a significant challenge. In this paper, we present a high-performance and low-complexity LDPC decoder, tailor-made to fulfill the 5G requirements. First, to close the gap between belief propagation (BP) decoding and its approximations in hardware, we propose an extension of adjusted min-sum decoding, called generalized adjusted min-sum (GA-MS) decoding. This decoding algorithm flexibly truncates the incoming messages at the check node level and carefully approximates the non-linear functions of BP decoding to balance the error-rate and hardware complexity. Numerical results demonstrate that the proposed fixed-point GAMS has only a minor gap of 0.1 dB compared to floating-point BP under various scenarios of 5G standard specifications. Secondly, we present a fully reconfigurable 5G NR LDPC decoder implementation based on GA-MS decoding. Given that memory occupies a substantial portion of the decoder area, we adopt multiple data compression and approximation techniques to reduce 42.2% of the memory overhead. The corresponding 28nm FD-SOI ASIC decoder has a core area of 1.823 mm2 and operates at 895 MHz. It is compatible with all 5G NR LDPC codes and achieves a peak throughput of 24.42 Gbps and a maximum area efficiency of 13.40 Gbps/mm2 at 4 decoding iterations.
Paper Structure (24 sections, 15 equations, 15 figures, 6 tables, 2 algorithms)

This paper contains 24 sections, 15 equations, 15 figures, 6 tables, 2 algorithms.

Figures (15)

  • Figure 1: A bipartite Tanner graph with VN update and CN update process.
  • Figure 2: Floating-point FER comparison of SP, A-Min$^*$, MS, NMS, OMS, and GA-MS decoding with $\beta$ and $\gamma\in\{2,3,4\}$ for 5G NR LDPC codes (BG1, $R=\frac{1}{3}$, $Z=384$, and $K_u=22$) using QPSK and $I_{\max}=15$.
  • Figure 3: Comparison of computational complexity (addition and CS, memory requirement, and LUT operations) among GA-MS decoding and various existing LDPC decoding algorithms.
  • Figure 4: Comparison of the results between the original box-plus operator and LUTs with varying values of $\beta$ in \ref{['eq:LUTGenerator']}.
  • Figure 5: Fixed-point FER comparison of GA-MS decoding with different quantization strategies and varying values of $\beta$ for 5G NR LDPC code (BG1, $R=\frac{1}{3}$, $Z=384$, and $K_u=22$) using QPSK and $I_{\max}=15$.
  • ...and 10 more figures