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DAG-aware Synthesis Orchestration

Yingjie Li, Mingju Liu, Mark Ren, Alan Mishchenko, Cunxi Yu

TL;DR

This work introduces DAG-aware Synthesis Orchestration to overcome the limitations of stand-alone DAG optimizations in AIG-based logic synthesis. By orchestrating rewrite, resubstitution, and refactoring within a single AIG traversal, the approach exposes more optimization opportunities and improves node reductions on large benchmark sets, including ABC and OpenROAD flows. Two orchestration strategies are proposed: Local-greedy, which selects the best local gain at each node, and Priority-ordered, which follows predefined operation priorities; both are shown to outperform stand-alone methods in single-traversal and iterative contexts, with notable gains in 104 benchmark designs. End-to-end evaluations in OpenROAD reveal improved logic minimization and area during technology mapping for most designs, though some misalignments with downstream technology mapping and routing emphasize the need for technology-aware orchestration in future work.

Abstract

The key methodologies of modern logic synthesis techniques are conducted on multi-level technology-independent representations such as And-Inverter-Graphs (AIGs) of the digital logic via directed-acyclic-graph (DAGs) traversal based structural rewriting, resubstitution, and refactoring. Existing state-of-the-art DAG-aware logic synthesis algorithms are all designed to perform stand-alone optimizations during a single DAG traversal. However, we empirically identify and demonstrate that these algorithms are limited in quality-of-results and runtime complexity due to this design concept. This work proposes Synthesis Orchestration, which orchestrates stand-alone operations within the single traversal of AIG. Thus, orchestration method explores more optimization opportunities and results in better performance. Our experimental results are comprehensively conducted on all 104 designs collected from ISCAS'85/89/99, VTR, and EPFL benchmark suites, with consistent logic minimization improvements over rewriting, resubstitution, refactoring, leading to an average of 4% more node reduction with improved runtime efficiency for the single optimization. Moreover, we evaluate orchestration as a plug-in algorithm in resyn and resyn3 flows in ABC, which demonstrates consistent logic minimization improvements (3.8% and 10.9% more node reduction on average). The runtime analysis demonstrates the orchestration outperforms stand-alone algorithms in both AIG minimization and runtime efficiency. Finally, we integrate the orchestration into OpenROAD for end-to-end performance evaluation. Our results demonstrate the advantages of the orchestration optimization technique, even after technology mapping and post-routing in the design flow have been conducted.

DAG-aware Synthesis Orchestration

TL;DR

This work introduces DAG-aware Synthesis Orchestration to overcome the limitations of stand-alone DAG optimizations in AIG-based logic synthesis. By orchestrating rewrite, resubstitution, and refactoring within a single AIG traversal, the approach exposes more optimization opportunities and improves node reductions on large benchmark sets, including ABC and OpenROAD flows. Two orchestration strategies are proposed: Local-greedy, which selects the best local gain at each node, and Priority-ordered, which follows predefined operation priorities; both are shown to outperform stand-alone methods in single-traversal and iterative contexts, with notable gains in 104 benchmark designs. End-to-end evaluations in OpenROAD reveal improved logic minimization and area during technology mapping for most designs, though some misalignments with downstream technology mapping and routing emphasize the need for technology-aware orchestration in future work.

Abstract

The key methodologies of modern logic synthesis techniques are conducted on multi-level technology-independent representations such as And-Inverter-Graphs (AIGs) of the digital logic via directed-acyclic-graph (DAGs) traversal based structural rewriting, resubstitution, and refactoring. Existing state-of-the-art DAG-aware logic synthesis algorithms are all designed to perform stand-alone optimizations during a single DAG traversal. However, we empirically identify and demonstrate that these algorithms are limited in quality-of-results and runtime complexity due to this design concept. This work proposes Synthesis Orchestration, which orchestrates stand-alone operations within the single traversal of AIG. Thus, orchestration method explores more optimization opportunities and results in better performance. Our experimental results are comprehensively conducted on all 104 designs collected from ISCAS'85/89/99, VTR, and EPFL benchmark suites, with consistent logic minimization improvements over rewriting, resubstitution, refactoring, leading to an average of 4% more node reduction with improved runtime efficiency for the single optimization. Moreover, we evaluate orchestration as a plug-in algorithm in resyn and resyn3 flows in ABC, which demonstrates consistent logic minimization improvements (3.8% and 10.9% more node reduction on average). The runtime analysis demonstrates the orchestration outperforms stand-alone algorithms in both AIG minimization and runtime efficiency. Finally, we integrate the orchestration into OpenROAD for end-to-end performance evaluation. Our results demonstrate the advantages of the orchestration optimization technique, even after technology mapping and post-routing in the design flow have been conducted.
Paper Structure (16 sections, 6 figures, 4 tables, 2 algorithms)

This paper contains 16 sections, 6 figures, 4 tables, 2 algorithms.

Table of Contents

  1. Introduction
  2. Preliminary
  3. Boolean Networks and AIGs
  4. DAG-Aware Logic Synthesis
  5. Approach
  6. Optimization Opportunities Studies
  7. Algorithm 1: Local-greedy Orchestration
  8. Algorithm 2: Priority-ordered Orchestration
  9. Experiments
  10. Single Optimization Evaluations
  11. Single Runtime Evaluations
  12. Iterative Optimization Evaluations
  13. End-to-end Evaluations
  14. Technology Mapping
  15. Post-Routing
  16. ...and 1 more sections

Figures (6)

  • Figure 1: The optimized graph produced by stand-alone optimization operations: (a) original AIG, graph size is 25; (b) optimized AIG with stand-alone rw, graph size is 23; (c) optimized AIG with stand-alone rf, graph size is 23; (d) optimized AIG with stand-alone rs, graph size is 22.
  • Figure 2: The optimization opportunities with different optimization operations. The $X-$axis denotes the optimization operations. The $Y-$axis denotes the number of valid iterations with the corresponding operation.
  • Figure 3: The Venn diagram for the design bfly—a detailed analysis of Figure \ref{['fig:bfly_bd']}—illustrates the relationships as follows: (a) among standalone optimizations; and (b) to (d) between orchestration optimization $\widehat{\texttt{O1}}$ (as defined in Section \ref{['sec: Orchrules']}) and each of rw, rs, rf, respectively. In each diagram, we consider only the nodes that participate in valid iterations within the respective optimizations. Furthermore, for $\widehat{\texttt{O1}}$ in diagrams (b) to (d), the number of valid iterations is aligned with that of the corresponding optimization for comparison.
  • Figure 4: The optimized graph produced by orchestration optimization operations: (a) optimized AIG with Local-greedy orchestration, graph size is 19; (b) optimized AIG with Priority-ordered orchestration, graph size is 21.
  • Figure 5: Runtime comparison between selected single-traversal orchestration policies ($\widehat{\texttt{O1}}$, $\widehat{\texttt{O3}}$, and Local-greedy (labeled as LGP)) and stand-alone optimizations from ABC: (a) runtime comparison with rw; (b) runtime comparison with rs; (c) runtime comparison with rf.
  • ...and 1 more figures