Unsupervised SFQ-Based Spiking Neural Network

TL;DR

This work addresses the challenge of energy-efficient, ultra-fast neuromorphic computation by leveraging Single Flux Quantum (SFQ) technology to implement Spiking Neural Networks (SNNs). It introduces an integrated on-chip training framework consisting of a quantized STDP engine, dynamic-threshold leaky integrate-and-fire neurons, and a superconducting winner-take-all mechanism, validated through JoSIM circuit simulations and BindsNET-based online learning models. Key contributions include a 1-bit quantized STDP update scheme with leaky NDRO spike tracing, self-inhibition-based dynamic thresholding to prevent burst firing, and an inductively coupled WTA circuit for robust competition among excitatory neurons. On MNIST-derived tasks (digits 0/1), the approach achieves up to ≈97% testing accuracy with 9 excitatory neurons, demonstrating the viability and scalability of on-chip SFQ SNN training for hardware-efficient neuromorphic computing.

Abstract

Single Flux Quantum (SFQ) technology represents a groundbreaking advancement in computational efficiency and ultra-high-speed neuromorphic processing. The key features of SFQ technology, particularly data representation, transmission, and processing through SFQ pulses, closely mirror fundamental aspects of biological neural structures. Consequently, SFQ-based circuits emerge as an ideal candidate for realizing Spiking Neural Networks (SNNs). This study presents a proof-of-concept demonstration of an SFQ-based SNN architecture, showcasing its capacity for ultra-fast switching at remarkably low energy consumption per output activity. Notably, our work introduces innovative approaches: (i) We introduce a novel spike-timing-dependent plasticity mechanism to update synapses and to trace spike-activity by incorporating a leaky non-destructive readout circuit. (ii) We propose a novel method to dynamically regulate the threshold behavior of leaky integrate and fire superconductor neurons, enhancing the adaptability of our SNN architecture. (iii) Our research incorporates a novel winner-take-all mechanism, aligning with practical strategies for SNN development and enabling effective decision-making processes. The effectiveness of these proposed structural enhancements is evaluated by integrating high-level models into the BindsNET framework. By leveraging BindsNET, we model the online training of an SNN, integrating the novel structures into the learning process. To ensure the robustness and functionality of our circuits, we employ JoSIM for circuit parameter extraction and functional verification through simulation.

Figures (9)

• Figure 1: The visualization of rate coding on the MNIST input image pixels and our network architecture. In the processing layer, a single excitatory neuron performs lateral inhibition over the other excitatory neurons, preventing them from firing due to the WTA feedback mechanism. The labels I and E represent input and excitatory neuron vertices, respectively. The variable K corresponds to the number of input pixels, whereas N shows the number of neurons in the processing layer.
• Figure 2: Example neuron and synapse scheme with pre and post-synaptic neuron spike cases for the learning curves of STDP.
• Figure 3: Cell view of the quantized STDP design following the scheme given in Fig. \ref{['fig:neuronSynapse_stdp']}. Trace-based spiking activity of pre and post-synaptic neurons is recorded in each leaky NDRO.
• Figure 4: LNDRO functional verification and its representation for the quantized STDP on the learning curve.
• Figure 5: LIF neuron with dynamic threshold using self-inhibition. The membrane state of a superconductor LIF neuron corresponds to the amount of current stored in its leaky loop. The neuron resting state is the baseline condition where no spike is received or generated.