Characterizing the Inter-Core Qubit Traffic in Large-Scale Quantum Modular Architectures

TL;DR

This paper investigates inter-core qubit traffic within large-scale modular quantum architectures by compiling diverse quantum circuits onto an all-to-all connected multi-core fabric and measuring both computation and inter-core communication workloads. Using OpenQL for compilation and a teleportation-swap inter-core protocol, it introduces metrics such as CCR and hotspotness to quantify computation–communication trade-offs and locality under strong and weak scaling up to ~1000 qubits. The study shows that circuit structure strongly determines inter-core traffic: structured circuits can maintain parallelism and moderate overhead, while highly entangling or all-to-all interacting circuits incur substantial inter-core communications, guiding co-design of hardware and compilers. These results lay the groundwork for application-oriented benchmarking of large-scale modular quantum processors and offer actionable guidelines for circuit mapping and resource allocation to improve scalability and reliability in future quantum computers.

Abstract

Modular quantum processor architectures are envisioned as a promising solution for the scalability of quantum computing systems beyond the Noisy Intermediate Scale Quantum (NISQ) devices era. Based upon interconnecting tens to hundreds of quantum cores via a quantum intranet, this approach unravels the pressing limitations of densely qubit-packed monolithic processors, mainly by mitigating the requirements of qubit control and enhancing qubit isolation, and therefore enables executing large-scale algorithms on quantum computers. In order to optimize such architectures, it is crucial to analyze the quantum state transfers occurring via inter-core communication networks, referred to as inter-core qubit traffic. This would also provide insights to improve the software and hardware stack for multi-core quantum computers. To this aim, we present a pioneering characterization of the spatio-temporal inter-core qubit traffic in large-scale circuits. The programs are executed on an all-to-all connected multi-core architecture that supports up to around 1000 qubits. We characterize the qubit traffic based on multiple performance metrics to assess the computational process and the communication overhead. Based on the showcased results, we conclude on the scalability of the presented algorithms, provide a set of guidelines to improve mapping quantum circuits to multi-core processors, and lay the foundations of benchmarking large-scale multi-core architectures.

Figures (10)

• Figure 1: Overview of the envisioned modular quantum computer architecture.
• Figure 2: Flow diagram of the qubit traffic analysis software tool.
• Figure 3: The Cuccaro Adder circuit mapping to virtual and physical qubits.
• Figure 4: Distribution of computation and communication operations over the execution timeslices in the strong scaling. Blue, orange, and green indicate the communication, parallel communication and computation, and computation operations, respectively.
• Figure 5: Performance metrics for the selected algorithms executed on modular architectures of 4, 16, and 60 cores, respectively, supporting around 1000 qubits in the strong scaling.