Bridging the complexity gap in Tbps-achieving THz-band baseband processing
Hadi Sarieddeen, Hakim Jemaa, Simon Tarboush, Christoph Studer, Mohamed-Slim Alouini, Tareq Y. Al-Naffouri
TL;DR
The paper tackles the Tbps gap in THz-band communications by proposing a THz-specific baseband framework that emphasizes parallelizability across the entire signal chain and the use of pseudo-soft information (PSI) to simplify decoding. It argues that THz channel structures—notably sparsity and near-field effects—enable structured bit mapping and subspace detection, which, together with short codes, reduce latency, storage, and power while maintaining performance. By introducing PSI derived from channel state and noise statistics, the approach achieves near-soft decoding performance with substantially lower complexity, and it discusses universal decoding options (e.g., GRAND) and AI-assisted enhancements as future directions. The work provides quantitative insights from THz simulations, discusses hardware implications, and outlines challenges and opportunities for realizing Tbps THz systems in practice.
Abstract
Recent advances in electronic and photonic technologies have allowed efficient signal generation and transmission at terahertz (THz) frequencies. However, as the gap in THz-operating devices narrows, the demand for terabit-per-second (Tbps)-achieving circuits is increasing. Translating the available hundreds of gigahertz (GHz) of bandwidth into a Tbps data rate requires processing thousands of information bits per clock cycle at state-of-the-art clock frequencies of digital baseband processing circuitry of a few GHz. This paper addresses these constraints and emphasizes the importance of parallelization in signal processing, particularly for channel code decoding. By leveraging structured sub-spaces of THz channels, we propose mapping bits to transmission resources using shorter code-words, extending parallelizability across all baseband processing blocks. THz channels exhibit quasi-deterministic frequency, time, and space structures that enable efficient parallel bit mapping at the source and provide pseudo-soft bit reliability information for efficient detection and decoding at the receiver.
