Implementation of digital MemComputing using standard electronic components

TL;DR

This work addresses the limitations of numerically simulated MemComputing machines by realizing a continuous-time hardware DMM with standard electronic components to solve 3-SAT problems. It derives ODE-based dynamics for $v_n$, memory variables $x_{s,m}$, and $x_{l,m}$, with a clause function $C_m$ and softmax weighting, and implements these dynamics in hardware using op-amps, logarithmic/exponential circuits, and a softmax transistor network. Empirical results from LTspice and Python simulations demonstrate convergence to correct solutions despite substantial input noise and show scalable performance with problem size, indicating potential speedups (up to ~8x) over purely numerical simulations. The findings establish a practical, scalable pathway for DMM hardware realizations and motivate experimental validation under real-world conditions.

Abstract

Digital MemComputing machines (DMMs), which employ nonlinear dynamical systems with memory (time non-locality), have proven to be a robust and scalable unconventional computing approach for solving a wide variety of combinatorial optimization problems. However, most of the research so far has focused on the numerical simulations of the equations of motion of DMMs. This inevitably subjects time to discretization, which brings its own (numerical) issues that would be otherwise absent in actual physical systems operating in continuous time. Although hardware realizations of DMMs have been previously suggested, their implementation would require materials and devices that are not so easy to integrate with traditional electronics. Addressing this, our study introduces a novel hardware design for DMMs, utilizing readily available electronic components. This approach not only significantly boosts computational speed compared to current models but also exhibits remarkable robustness against additive noise. Crucially, it circumvents the limitations imposed by numerical noise, ensuring enhanced stability and reliability during extended operations. This paves a new path for tackling increasingly complex problems, leveraging the inherent advantages of DMMs in a more practical and accessible framework.

Figures (17)

• Figure 1: Circuit for the implementation of the short-term memory variable, $x_s$. The circuit takes in the pre-computed voltage, $dx_s$, integrates it, and subsequently produces the updated value of $x_s$.
• Figure 2: Implementation of the voltage dynamics, Eq. \ref{['eq:v']}, with a built-in negation mechanism.
• Figure 3: Implementation of the long-term memory dynamics, Eq. \ref{['eq:xl']}. Here, the input $dx_l=C_m+\lambda$, and log-sum-exp computation is employed to restore Eq. \ref{['eq:xl']}. Note that our implementation of the logarithm and exponential amplifiers contains a negative sign (see \ref{['appendix:circuit']}).
• Figure 4: The module computing the time derivatives of the variables. It accepts the possibly negated variables, $v_1, v_2$ and $v_3$, and the short-term memory $x_s$, and outputs the intermediate results of their time derivatives, $dx_s$, $dx_l$, $dv_{n,1}$ and $dv_{n,2}$.
• Figure 5: Comparison of the trajectories of the first five variables in a 3-SAT problem with 10 variables and 43 clauses for (a) LTspice circuit emulation, with no noise added, (b) Python numerical simulation, (c) LTspice circuit emulation, with $10\%$ white noise, and (d) LTspice circuit emulation, with $20\%$ white noise. With the same initial conditions, the trajectories are initially similar, but soon differ due to differences in noise (both physical and numerical). However, despite the paths are different, eventually they all converge to the same solution.