Logo
ScienceStack
Table of Contents
Fetching ...
Sign In

CktGNN: Circuit Graph Neural Network for Electronic Design Automation

Zehao Dong, Weidong Cao, Muhan Zhang, Dacheng Tao, Yixin Chen, Xuan Zhang

TL;DR

This work tackles automated analog circuit design by addressing both topology generation and device sizing within a unified graph-learning framework. It introduces CktGNN, a two-level GNN with an ordered subgraph basis that encodes circuits as DAGs by first representing non-overlapping subgraphs and then performing directed message passing to capture computation, enabling topology synthesis and parameter optimization. To support reproducible research, the authors present Open Circuit Benchmark (OCB), a public dataset of 10K op-amps with simulator-derived specifications and an interface for generating and evaluating circuit designs. Experiments show CktGNN outperforms strong baselines on predictive accuracy and topology reconstruction, yields higher-quality circuit designs in real-world design tasks, and delivers improved encoding efficiency, highlighting the potential of learning-based, open-source EDA for analog circuits. The work thus advances learning-based open-source design automation with a scalable framework and a usable benchmark for broader adoption.

Abstract

The electronic design automation of analog circuits has been a longstanding challenge in the integrated circuit field due to the huge design space and complex design trade-offs among circuit specifications. In the past decades, intensive research efforts have mostly been paid to automate the transistor sizing with a given circuit topology. By recognizing the graph nature of circuits, this paper presents a Circuit Graph Neural Network (CktGNN) that simultaneously automates the circuit topology generation and device sizing based on the encoder-dependent optimization subroutines. Particularly, CktGNN encodes circuit graphs using a two-level GNN framework (of nested GNN) where circuits are represented as combinations of subgraphs in a known subgraph basis. In this way, it significantly improves design efficiency by reducing the number of subgraphs to perform message passing. Nonetheless, another critical roadblock to advancing learning-assisted circuit design automation is a lack of public benchmarks to perform canonical assessment and reproducible research. To tackle the challenge, we introduce Open Circuit Benchmark (OCB), an open-sourced dataset that contains $10$K distinct operational amplifiers with carefully-extracted circuit specifications. OCB is also equipped with communicative circuit generation and evaluation capabilities such that it can help to generalize CktGNN to design various analog circuits by producing corresponding datasets. Experiments on OCB show the extraordinary advantages of CktGNN through representation-based optimization frameworks over other recent powerful GNN baselines and human experts' manual designs. Our work paves the way toward a learning-based open-sourced design automation for analog circuits. Our source code is available at \url{https://github.com/zehao-dong/CktGNN}.

CktGNN: Circuit Graph Neural Network for Electronic Design Automation

TL;DR

This work tackles automated analog circuit design by addressing both topology generation and device sizing within a unified graph-learning framework. It introduces CktGNN, a two-level GNN with an ordered subgraph basis that encodes circuits as DAGs by first representing non-overlapping subgraphs and then performing directed message passing to capture computation, enabling topology synthesis and parameter optimization. To support reproducible research, the authors present Open Circuit Benchmark (OCB), a public dataset of 10K op-amps with simulator-derived specifications and an interface for generating and evaluating circuit designs. Experiments show CktGNN outperforms strong baselines on predictive accuracy and topology reconstruction, yields higher-quality circuit designs in real-world design tasks, and delivers improved encoding efficiency, highlighting the potential of learning-based, open-source EDA for analog circuits. The work thus advances learning-based open-source design automation with a scalable framework and a usable benchmark for broader adoption.

Abstract

The electronic design automation of analog circuits has been a longstanding challenge in the integrated circuit field due to the huge design space and complex design trade-offs among circuit specifications. In the past decades, intensive research efforts have mostly been paid to automate the transistor sizing with a given circuit topology. By recognizing the graph nature of circuits, this paper presents a Circuit Graph Neural Network (CktGNN) that simultaneously automates the circuit topology generation and device sizing based on the encoder-dependent optimization subroutines. Particularly, CktGNN encodes circuit graphs using a two-level GNN framework (of nested GNN) where circuits are represented as combinations of subgraphs in a known subgraph basis. In this way, it significantly improves design efficiency by reducing the number of subgraphs to perform message passing. Nonetheless, another critical roadblock to advancing learning-assisted circuit design automation is a lack of public benchmarks to perform canonical assessment and reproducible research. To tackle the challenge, we introduce Open Circuit Benchmark (OCB), an open-sourced dataset that contains K distinct operational amplifiers with carefully-extracted circuit specifications. OCB is also equipped with communicative circuit generation and evaluation capabilities such that it can help to generalize CktGNN to design various analog circuits by producing corresponding datasets. Experiments on OCB show the extraordinary advantages of CktGNN through representation-based optimization frameworks over other recent powerful GNN baselines and human experts' manual designs. Our work paves the way toward a learning-based open-sourced design automation for analog circuits. Our source code is available at \url{https://github.com/zehao-dong/CktGNN}.
Paper Structure (27 sections, 2 theorems, 3 equations, 8 figures, 5 tables)

This paper contains 27 sections, 2 theorems, 3 equations, 8 figures, 5 tables.

Table of Contents

  1. Introduction
  2. Related Works
  3. Graph Neural Networks
  4. Automated Analog Circuit Design
  5. Circuit Graph Neural Network
  6. Two-level GNN Framework with a Subgraph Basis
  7. The CktGNN Model
  8. Discussions
  9. Open Circuit Benchmark
  10. Experiments
  11. Dataset, Baselines, and Tasks
  12. Predictive Performance and Topology Reconstruction Accuracy
  13. Circuit Encoding Efficiency
  14. Effectiveness in Real-World Electronic Circuit Design
  15. Conclusion and Discussions
  16. ...and 12 more sections

Key Result

Theorem 3.2

Let subgraph basis $\mathbb{B}$ contain every subgraph of size $1$. There exists an injective graph transformation $f$, if each subgraph $g_{v^{'}} \in \mathbb{B}$ has only one node to be the head (tail) of a directed edge whose tail (head) is outside the subgraph $g_{v^{'}}$.

Figures (8)

  • Figure 1: Illustration of the two-level GNN framework with a pre-designed subgraph basis. It first represents input graph $g$ as a combination of subgraphs in the subgraph basis $\mathbb{B}$ and then learns representations of subgraphs with inner GNNs. The subgraph representations are used as input features to the outer message passing operation, where the message passing can be directed/undirected.
  • Figure 2: Illustration of the overall framework. The performance evaluation of circuits is implemented on the circuit simulator. In the representation learning process, we formulate a subgraph basis for operational amplifiers to implement the CktGNN model.
  • Figure 3: Comparison of training/inference efficiency.
  • Figure 4: The conceptual illustration of a three-stage op-amp.
  • Figure 5: Different topologies of single-stage Op-Amps. (a) A differential Op-Amp. (b) A single-end Op-Amp.
  • ...and 3 more figures

Theorems & Definitions (3)

  • Definition 3.1
  • Theorem 3.2
  • Corollary B.1