Constant-depth circuits for Boolean functions and quantum memory devices using multi-qubit gates

Abstract

We explore the power of the unbounded Fan-Out gate and the Global Tunable gates generated by Ising-type Hamiltonians in constructing constant-depth quantum circuits, with particular attention to quantum memory devices. We propose two types of constant-depth constructions for implementing Uniformly Controlled Gates. These gates include the Fan-In gates defined by $|x\rangle|b\rangle\mapsto |x\rangle|b\oplus f(x)\rangle$ for $x\in\{0,1\}^n$ and $b\in\{0,1\}$, where $f$ is a Boolean function. The first of our constructions is based on computing the one-hot encoding of the control register $|x\rangle$, while the second is based on Boolean analysis and exploits different representations of $f$ such as its Fourier expansion. Via these constructions, we obtain constant-depth circuits for the quantum counterparts of read-only and read-write memory devices -- Quantum Random Access Memory (QRAM) and Quantum Random Access Gate (QRAG) -- of memory size $n$. The implementation based on one-hot encoding requires either $O(n\log^{(d)}{n}\log^{(d+1)}{n})$ ancillae and $O(n\log^{(d)}{n})$ Fan-Out gates or $O(n\log^{(d)}{n})$ ancillae and $16d-10$ Global Tunable gates, where $d$ is any positive integer and $\log^{(d)}{n} = \log\cdots \log{n}$ is the $d$-times iterated logarithm. On the other hand, the implementation based on Boolean analysis requires $8d-6$ Global Tunable gates at the expense of $O(n^{1/(1-2^{-d})})$ ancillae.

Figures (11)

• Figure 1: We give constant-depth circuits for $f$-$\mathsf{UCG}$s, which contain $f$-$\mathsf{FIN}$s and a subset of quantum memory devices ($\mathsf{QMD}$) including $\mathsf{QRAM}$ (and its generalization we call $f$-$\mathsf{QRAM}$) as special cases. Although $\mathsf{QRAG}$ is not an $f$-$\mathsf{FIN}$, our (one-hot-encoding-based) construction for $\mathsf{QRAM}$ can be adapted to it.
• Figure 2: The architecture of a Quantum Processing Unit ($\mathsf{QPU}$) with access to a quantum memory device ($\mathsf{QMD}$). The $\mathsf{QPU}$ encompasses a ($\mathop{\mathrm{poly}}\nolimits\log{n}$)-qubit input register $\mathtt{I}$ and workspace $\mathtt{W}$, a ($\log{n}$)-qubit address register $\mathtt{A}$, and an $\ell$-qubit target register $\mathtt{T}$, while the $\mathsf{QMD}$ encompasses the address register $\mathtt{A}$, the target register $\mathtt{T}$, an $n\ell$-qubit memory array $\mathtt{M}$ composed of $n$ cells $x_0,\dots,x_{n-1} \in \{0,1\}^\ell$ of $\ell$ qubits each, and a ($\mathop{\mathrm{poly}}\nolimits{n}$)-qubit auxiliary register $\mathtt{Aux}$.
• Figure 3: (a) A sequential implementation of $f\text{-}\mathsf{UCG}_{[n]\to n}^{(n)}$. (b) The gate $|x\rangle\langle x|\otimes \mathsf{U} + \sum_{j\in\{0,1\}^n\setminus\{x\}}|j\rangle\langle j|\otimes \mathbb{I}_1$ can be implemented by employing two $\mathsf{AND}$ gates onto an ancillary qubit and controlling $\mathsf{U}\in\mathcal{U}(\mathbb{C}^{2\times 2})$ on it being in the $|1\rangle$ state barenco1995elementary.
• Figure 4: (a) A serial circuit of unitaries $\mathsf{U}_j = e^{i\pi \alpha_j}\mathsf{Z}(\beta_j)\mathsf{H}\mathsf{Z}(\gamma_j)\mathsf{H}\mathsf{Z}(\delta_j)$ controlled on the single-qubit register $\mathtt{E}_j$ being in the $|1\rangle$ state, $j\in[n]$. (b) If the control qubits $|e\rangle_{\mathtt{E}} = \bigotimes_{j\in[n]}|e_j\rangle_{\mathtt{E}_j}$ are such that $e\in\{0,1\}^n$ has Hamming weight at most $1$ ($|e|\leq 1$), then the gates composing $\mathsf{U}_0,\dots,\mathsf{U}_{n-1}$ can be rearranged as shown in the equivalent circuit.
• Figure 5: The circuit for an $f$-$\mathsf{UCG}^{(n)}$ using Fan-Out gates, where $f$ is a $(J,r)$-junta with $|\overline{J}| = t$. For simplicity, we include targets from $|x_i\rangle_{\mathtt{J}}$ onto all registers $\{\mathtt{J}_{z,j}\}_{z,j}$, but in reality $x_i$ is copied onto the registers $\{\mathtt{J}_{z,j}\}_j$ for all $z\in\{0,1\}^t$ such that $i\in J_z$, where $J_z$ is the set of coordinated that $f_{J|z}$ depends on. Moreover, we omit the indices in the parameters $\alpha_{z}(j)$, $\beta_{z}(j)$, $\gamma_{z}(j)$, $\delta_{z}(j)$.

Theorems & Definitions (50)

• Definition 7: Quantum Processing Unit
• Definition 8: Quantum Processing Unit and Quantum Memory Device
• Definition 9: $f$-$\mathsf{QRAM}$
• Definition 10: $\mathsf{QRAG}$
• Lemma 11: Simulating $\mathsf{QRAM}$ with $\mathsf{QRAG}$
• proof
• Lemma 12: Simulating $\mathsf{QRAG}$ with $\mathsf{QRAM}$
• proof
• Definition 13: $f$-Uniformly Controlled Gate
• Definition 14: $f$-Fan-In gate