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The Data Conversion Bottleneck in Analog Computing Accelerators

James T. Meech, Vasileios Tsoutsouras, Phillip Stanley-Marbell

TL;DR

The paper examines the data conversion bottleneck that limits analog computing accelerators, with a focus on optical Fourier transform and convolution hardware. It combines a hardware prototype study and theoretical analysis to show that data movement dominates end-to-end performance, yielding a median end-to-end speedup of ${1.94\times}$ and an average of ${9.39\times}$ across 27 benchmarks when data-movement costs are idealized as zero; larger gains only appear for pure FFT or convolution workloads. By applying Amdahl's law and discussing converter frontiers, the authors argue that practical viability requires converter improvements far beyond current capabilities and that accelerators should target high-complexity problems or architectures that minimize data movement. Consequently, the work cautions against expecting broad, dramatic speedups from analog optical accelerators for general workloads and offers strategic directions emphasizing problem classes and integrated hardware-software design to mitigate data-conversion costs.

Abstract

Most modern computing tasks have digital electronic input and output data. Due to these constraints imposed by real-world use cases of computer systems, any analog computing accelerator, whether analog electronic or optical, must perform an analog-to-digital conversion on its input data and a subsequent digital-to-analog conversion on its output data. The energy and latency costs incurred by data conversion place performance limits on analog computing accelerators. To avoid this overhead, analog hardware must replace the full functionality of traditional digital electronic computer hardware. This is not currently possible for optical computing accelerators due to limitations in gain, input-output isolation, and information storage in optical hardware. This article presents a case study that profiles 27 benchmarks for an analog optical Fourier transform and convolution accelerator which we designed and built. The case study shows that an ideal optical Fourier transform and convolution accelerator can produce an average speedup of 9.4 times and a median speedup of 1.9 times for the set of benchmarks. The optical Fourier transform and convolution accelerator only produces significant speedup for pure Fourier transform (45.3 times) and convolution (159.4 times) applications.

The Data Conversion Bottleneck in Analog Computing Accelerators

TL;DR

The paper examines the data conversion bottleneck that limits analog computing accelerators, with a focus on optical Fourier transform and convolution hardware. It combines a hardware prototype study and theoretical analysis to show that data movement dominates end-to-end performance, yielding a median end-to-end speedup of and an average of across 27 benchmarks when data-movement costs are idealized as zero; larger gains only appear for pure FFT or convolution workloads. By applying Amdahl's law and discussing converter frontiers, the authors argue that practical viability requires converter improvements far beyond current capabilities and that accelerators should target high-complexity problems or architectures that minimize data movement. Consequently, the work cautions against expecting broad, dramatic speedups from analog optical accelerators for general workloads and offers strategic directions emphasizing problem classes and integrated hardware-software design to mitigate data-conversion costs.

Abstract

Most modern computing tasks have digital electronic input and output data. Due to these constraints imposed by real-world use cases of computer systems, any analog computing accelerator, whether analog electronic or optical, must perform an analog-to-digital conversion on its input data and a subsequent digital-to-analog conversion on its output data. The energy and latency costs incurred by data conversion place performance limits on analog computing accelerators. To avoid this overhead, analog hardware must replace the full functionality of traditional digital electronic computer hardware. This is not currently possible for optical computing accelerators due to limitations in gain, input-output isolation, and information storage in optical hardware. This article presents a case study that profiles 27 benchmarks for an analog optical Fourier transform and convolution accelerator which we designed and built. The case study shows that an ideal optical Fourier transform and convolution accelerator can produce an average speedup of 9.4 times and a median speedup of 1.9 times for the set of benchmarks. The optical Fourier transform and convolution accelerator only produces significant speedup for pure Fourier transform (45.3 times) and convolution (159.4 times) applications.
Paper Structure (18 sections, 3 equations, 9 figures, 1 table)

This paper contains 18 sections, 3 equations, 9 figures, 1 table.

Figures (9)

  • Figure 1: Architectures for computational problems with digital input and output data. Let $a(x)$ be an analog function and $d(x)$ be a digital function, both computed using the input data $x$.
  • Figure 2: The digital-to-analog and analog-to-digital converter speed and power consumption tradeoff.
  • Figure 3: The computational and conversion complexity of problem classes on a logarithmic scale.
  • Figure 4: Architectures for computational problems with a variety of input and output data. Let $a(x)$ be an analog function, and $d(x)$ be a digital function both computed using the input data $x$.
  • Figure 5: The 4$f$ setup for optical convolution where $A$ and $B$ are programmable apertures and $C$ is a camera detector. Each optical component is spaced a distance $f$ from the previous one where $f$ is the focal length of the convex lenses Ambs2010.
  • ...and 4 more figures