Logo
ScienceStack
Table of Contents
Fetching ...
Sign In

On the Error-Reducing Properties of Superposition Codes

Kirill Andreev, Pavel Rybin, Alexey Frolov

TL;DR

This paper proposes an LDPC-based superposition code scheme with low-complexity soft successive interference cancellation (SIC) decoding that demonstrates comparable performance to SPARCs while maintaining manageable complexity.

Abstract

Next-generation wireless communication systems impose much stricter requirements for transmission rate, latency, and reliability. The peak data rate of 6G networks should be no less than 1 Tb/s, which is comparable to existing long-haul optical transport networks. It is believed that using long error-correcting codes (ECC) with soft-decision decoding (SDD) is not feasible in this case due to the resulting high power consumption. On the other hand, ECC with hard-decision decoding (HDD) suffers from significant performance degradation. In this paper, we consider a concatenated solution consisting of an outer long HDD code and an inner short SDD code. The latter code is a crucial component of the system and the focus of our research. Due to its short length, the code cannot correct all errors, but it is designed to minimize the number of errors. Such codes are known as error-reducing codes. We investigate the error-reducing properties of superposition codes. Initially, we explore sparse regression codes (SPARCs) with Gaussian signals. This approach outperforms error-reducing binary LDPC codes optimized by Barakatain, et al. (2018) in terms of performance but faces limitations in practical applicability due to high implementation complexity. Subsequently, we propose an LDPC-based superposition code scheme with low-complexity soft successive interference cancellation (SIC) decoding. This scheme demonstrates comparable performance to SPARCs while maintaining manageable complexity. Numerical results were obtained for inner codes with an overhead (OH) of 8.24% within a concatenated scheme (15% OH) with an outer hard-decision decoded staircase code (6.25% OH).

On the Error-Reducing Properties of Superposition Codes

TL;DR

This paper proposes an LDPC-based superposition code scheme with low-complexity soft successive interference cancellation (SIC) decoding that demonstrates comparable performance to SPARCs while maintaining manageable complexity.

Abstract

Next-generation wireless communication systems impose much stricter requirements for transmission rate, latency, and reliability. The peak data rate of 6G networks should be no less than 1 Tb/s, which is comparable to existing long-haul optical transport networks. It is believed that using long error-correcting codes (ECC) with soft-decision decoding (SDD) is not feasible in this case due to the resulting high power consumption. On the other hand, ECC with hard-decision decoding (HDD) suffers from significant performance degradation. In this paper, we consider a concatenated solution consisting of an outer long HDD code and an inner short SDD code. The latter code is a crucial component of the system and the focus of our research. Due to its short length, the code cannot correct all errors, but it is designed to minimize the number of errors. Such codes are known as error-reducing codes. We investigate the error-reducing properties of superposition codes. Initially, we explore sparse regression codes (SPARCs) with Gaussian signals. This approach outperforms error-reducing binary LDPC codes optimized by Barakatain, et al. (2018) in terms of performance but faces limitations in practical applicability due to high implementation complexity. Subsequently, we propose an LDPC-based superposition code scheme with low-complexity soft successive interference cancellation (SIC) decoding. This scheme demonstrates comparable performance to SPARCs while maintaining manageable complexity. Numerical results were obtained for inner codes with an overhead (OH) of 8.24% within a concatenated scheme (15% OH) with an outer hard-decision decoded staircase code (6.25% OH).
Paper Structure (6 sections, 7 equations, 2 figures, 3 tables, 2 algorithms)

This paper contains 6 sections, 7 equations, 2 figures, 3 tables, 2 algorithms.

Table of Contents

  1. Introduction
  2. Preliminaries
  3. SPARCs approach
  4. LDPC-based superposition codes approach
  5. Numerical results
  6. Conclusion and future work

Figures (2)

  • Figure 1: BER and FER for different solutions. Frame error rate values are presented with dashed lines. For the bit error rates, the scatter points correspond to actual values, and the lines correspond to a polynomial regression fit with the Bernoulli loss function. The dotted line corresponds to a single LDPC setup optimized for error-reducing.
  • Figure 2: BER for different rate and power split. Each curve corresponds to different $k_1 \in \left\{70, 170, \ldots, 2770\right\}$ information bits, $k_1 + k_2 = k$. Color corresponds to different values of $k_1$ represented by the colormap on the right of the figure. The horizontal axis corresponds to a linear fraction of transmit power allocated to the first code. SNR is $3.1$ dB.