HiHGNN: Accelerating HGNNs through Parallelism and Data Reusability Exploitation

TL;DR

The paper addresses the inefficiency of existing accelerators for heterogeneous graph neural networks (HGNNs) by first characterizing HGNN workloads on GPUs and then designing HiHGNN, a bound-aware HGNN accelerator that exploits inter-graph parallelism and data reuse. The core innovations are a bound-aware stage fusion programming model, independency-aware parallel execution with a multi-lane datapath, and similarity-aware data reuse scheduling enabled by a bitmap-based memory reuse mechanism and a hypergraph-based execution order. Empirical results show HiHGNN substantially outperforms state-of-the-art GPU implementations (roughly 40× faster than T4 and 8× faster than A100) with major energy savings and reduced DRAM traffic, plus FPGA validation of feasibility. This work demonstrates practical HGNN acceleration and highlights the potential of inter-semantic-graph parallelism and data reuse as key design principles for future HGNN hardware.

Abstract

Heterogeneous graph neural networks (HGNNs) have emerged as powerful algorithms for processing heterogeneous graphs (HetGs), widely used in many critical fields. To capture both structural and semantic information in HetGs, HGNNs first aggregate the neighboring feature vectors for each vertex in each semantic graph and then fuse the aggregated results across all semantic graphs for each vertex. Unfortunately, existing graph neural network accelerators are ill-suited to accelerate HGNNs. This is because they fail to efficiently tackle the specific execution patterns and exploit the high-degree parallelism as well as data reusability inside and across the processing of semantic graphs in HGNNs. In this work, we first quantitatively characterize a set of representative HGNN models on GPU to disclose the execution bound of each stage, inter-semantic-graph parallelism, and inter-semantic-graph data reusability in HGNNs. Guided by our findings, we propose a high-performance HGNN accelerator, HiHGNN, to alleviate the execution bound and exploit the newfound parallelism and data reusability in HGNNs. Specifically, we first propose a bound-aware stage-fusion methodology that tailors to HGNN acceleration, to fuse and pipeline the execution stages being aware of their execution bounds. Second, we design an independency-aware parallel execution design to exploit the inter-semantic-graph parallelism. Finally, we present a similarity-aware execution scheduling to exploit the inter-semantic-graph data reusability. Compared to the state-of-the-art software framework running on NVIDIA GPU T4 and GPU A100, HiHGNN respectively achieves an average 41.5$\times$ and 8.6$\times$ speedup as well as 106$\times$ and 73$\times$ energy efficiency with quarter the memory bandwidth of GPU A100.

Figures (17)

• Figure 1: Illustration of HGNNs.
• Figure 2: Execution time breakdown.
• Figure 3: CUDA kernels in the floating-point operation Roofline of GPU T4 on HAN model with DBLP dataset.
• Figure 4: Execution flow of HGNN programming model: (a) Traditional staged programming model; (b) Bound-aware stage-fusion programming model.
• Figure 5: Basic design of HiHGNN architecture.