Eliminating Media Noise While Preserving Storage Capacity: Reconfigurable Constrained Codes for Two-Dimensional Magnetic Recording

TL;DR

This paper presents capacity-achieving codes that forbid both PIS and IPIS patterns in TDMR systems with wide read heads, and introduces another coding scheme to remove RTIS patterns in TDMR systems which offers lower complexity, lower error propagation, and track separation, at the expense of a limited rate loss.

Abstract

Magnetic recording devices are still competitive in the storage density race thanks to new technologies such as two-dimensional magnetic recording (TDMR). Error-prone patterns where a bit is surrounded by complementary bits at the four positions with Manhattan distance $1$ on the TDMR grid are called plus isolation (PIS) patterns. Recently, we introduced optimal plus LOCO (OP-LOCO) codes that prevent these patterns from being written. However, as the device ages, error-prone patterns where a bit is surrounded by complementary bits at only three positions with Manhattan distance $1$ emerge, and we call these incomplete PIS (IPIS) patterns. In this paper, we present capacity-achieving codes that forbid both PIS and IPIS patterns in TDMR systems with wide read heads. We collectively call these patterns rotated T isolation (RTIS) patterns, and we call the new codes optimal T LOCO (OT-LOCO) codes. We analyze OT-LOCO codes and derive their encoding-decoding rule. Simulation results demonstrate that OT-LOCO codes entirely eliminate media noise at practical TD densities. We suggest using OP-LOCO codes early in the device lifetime, then reconfiguring to OT-LOCO codes later on. Moreover, we introduce another coding scheme to remove RTIS patterns which offers lower complexity, lower error propagation, and track separation.

Figures (12)

• Figure 1: The detrimental SIS and PIS patterns. An error is highly likely to occur on the circled bit at the center even if the device is relatively fresh.
• Figure 2: The detrimental rotated T isolation or RTIS patterns (shaped as the letter T rotated). The likelihood of an error on the circled bit at the center if an RTIS pattern is an IPIS pattern increases as the device ages.
• Figure 3: The evolution of TDMR error profile with TD density. PIS (IPIS) error percentage decreases (increases) as TD density increases.
• Figure 4: The evolution of TDMR error profile with TD energy. PIS (IPIS) error percentage decreases (increases) as TD energy decreases.
• Figure 5: An FSTD representing an infinite $\mathcal{OT}^8$-constrained sequence where patterns in $\mathcal{OT}^8$ are prevented.

Theorems & Definitions (16)

• Definition 1: OP-LOCO Code
• Remark 1
• Definition 2: OT-LOCO Code
• Theorem 1
• proof
• Theorem 2
• proof
• Remark 2
• Remark 3
• Remark 4