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TPU as Cryptographic Accelerator

Rabimba Karanjai, Sangwon Shin, and Wujie Xiong, Xinxin Fan, Lin Chen, Tianwei Zhang, Taeweon Suh, Weidong Shi, Veronika Kuchta, Francesco Sica, Lei Xu

TL;DR

This paper explores the potential of leveraging TPUs/NPUs to accelerate polynomial multiplication, thereby enhancing the performance of FHE and ZKP schemes and presents techniques to adapt polynomial multiplication to these AI-centric architectures and provides a preliminary evaluation of their effectiveness.

Abstract

Cryptographic schemes like Fully Homomorphic Encryption (FHE) and Zero-Knowledge Proofs (ZKPs), while offering powerful privacy-preserving capabilities, are often hindered by their computational complexity. Polynomial multiplication, a core operation in these schemes, is a major performance bottleneck. While algorithmic advancements and specialized hardware like GPUs and FPGAs have shown promise in accelerating these computations, the recent surge in AI accelerators (TPUs/NPUs) presents a new opportunity. This paper explores the potential of leveraging TPUs/NPUs to accelerate polynomial multiplication, thereby enhancing the performance of FHE and ZKP schemes. We present techniques to adapt polynomial multiplication to these AI-centric architectures and provide a preliminary evaluation of their effectiveness. We also discuss current limitations and outline future directions for further performance improvements, paving the way for wider adoption of advanced cryptographic tools.

TPU as Cryptographic Accelerator

TL;DR

This paper explores the potential of leveraging TPUs/NPUs to accelerate polynomial multiplication, thereby enhancing the performance of FHE and ZKP schemes and presents techniques to adapt polynomial multiplication to these AI-centric architectures and provides a preliminary evaluation of their effectiveness.

Abstract

Cryptographic schemes like Fully Homomorphic Encryption (FHE) and Zero-Knowledge Proofs (ZKPs), while offering powerful privacy-preserving capabilities, are often hindered by their computational complexity. Polynomial multiplication, a core operation in these schemes, is a major performance bottleneck. While algorithmic advancements and specialized hardware like GPUs and FPGAs have shown promise in accelerating these computations, the recent surge in AI accelerators (TPUs/NPUs) presents a new opportunity. This paper explores the potential of leveraging TPUs/NPUs to accelerate polynomial multiplication, thereby enhancing the performance of FHE and ZKP schemes. We present techniques to adapt polynomial multiplication to these AI-centric architectures and provide a preliminary evaluation of their effectiveness. We also discuss current limitations and outline future directions for further performance improvements, paving the way for wider adoption of advanced cryptographic tools.
Paper Structure (13 sections, 5 equations, 2 figures, 3 tables, 1 algorithm)

This paper contains 13 sections, 5 equations, 2 figures, 3 tables, 1 algorithm.

Table of Contents

  1. Introduction
  2. Detailed Design of TPU-based Polynomial Multiplication
  3. Polynomials Used in Cryptography and Their Operations
  4. Converting Polynomial Multiplication to Matrix Operations
  5. Challenges of Using TPU for Polynomial Multiplication
  6. Handling Large Coefficients
  7. Handling High Polynomial Degrees
  8. Key Parameters Selection
  9. Putting All Pieces Together
  10. Experiments and Evaluation
  11. Further Improving Polynomial Multiplication with TPU
  12. Related Works
  13. Conclusion and Future Work

Figures (2)

  • Figure 1: Demonstration of handling of polynomials with high degree. On the left side of the figure, we evenly break the vector into two sub-vectors and the matrix into four sub-matrices. On the right side, the original vector-matrix multiplication is decomposed into four vector-matrix multiplications with smaller dimensions.
  • Figure 2: Summary of experiment results using Google TPU with different configurations.

Theorems & Definitions (1)

  • Example 1