Enhanced Read Resolution in Reconfigurable Memristive Synapses for Spiking Neural Networks

TL;DR

The paper addresses the challenge of READ current resolution in memristive synapses used for neuromorphic spiking neural networks. It combines an empirical Verilog-A model of HfO2 memristors with device-sizing optimization and runtime adaptations, namely READ voltage scaling and MN2 body biasing, to boost READ current resolution. The key contributions include up to 4.3x and 21% gains from stage sizing, 46% and 15% gains from runtime scaling methods, and demonstrable improvements in classification tasks within the TENNLab framework due to higher read accuracy and reliability. The work advances reliable, high-resolution weight reading in analog memristive synapses, enabling more robust neuromorphic hardware with adaptable read margins for real-world noisy environments.

Abstract

Synapse is a key element of any neuromorphic computing system which is mostly constructed with memristor devices. A memristor is a two-terminal analog memory device. Memristive synapse suffers from various challenges such as forming at high voltage, SET, RESET failure, and READ margin or resolution issue between two weights. Enhanced READ resolution is very important to make a memristive synapse functionally reliable. Usually, the READ resolution is very small for a memristive synapse with 4-bit data precision. This work considers a step-by-step analysis to enhance the READ current resolution for a current-controlled memristor-based synapse. An empirical model is used to characterize the HfO2-based memristive device. 1st and 2nd stage device of our proposed synapse can be scaled to enhance the READ current margin up to ~ 4.3x and ~ 21% respectively. Moreover, READ current resolution can be enhanced with run-time adaptation features such as READ voltage scaling and body biasing. The READ voltage scaling and body biasing can improve the READ current resolution by about 46% and 15% respectively. TENNLabs' neuromorphic computing framework is leveraged to evaluate the effect of READ current resolution on classification applications. Higher READ current resolution shows better accuracy than lower resolution with different percentages of read noise scenarios.

Figures (8)

• Figure 1: Memristor with READ circuitry is illustrated. READ operation requires 1-PMOS and 2-NMOS. READ operation folded into two parts. $1^{st}$ stage current is generated with $M_{P1}$ and $M_{N1}$. This current initiates a voltage to operate $M_{N2}$ in the linear region. Finally, the READ current will be sensed from the drain of $M_{N2}$. The body of the $M_{N2}$ is considered as a dedicated signal to control the threshold of this device.
• Figure 2: READ simulation results are illustrated based on the sizing of $M_{P1}$ and $M_{N1}$. The length and width of $M_{N2}$ are fixed at 0.5µm. (a) $M_{P1}$ is varied from 0.5µm to 4µm. In addition,$M_{N1}$ is varied from 1µm to 4µm. Larger $M_{N1}$ shows a higher impact on the READ current resolution. (b) shows the READ current scale with different size of $M_{P1}$, when the width of the $M_{N1}$ is fixed at 4µm.
• Figure 3: Cadence simulation results for READ current resolutions with different width and length of $M_{N2}$ device. (a) shows the READ current resolution when the length of the $M_{N2}$ is fixed at 0.5µm and the width is varied from 0.5µm to 4µm. The current resolution is drastically decreased with the increment of $M_{N2}$'s width. (b) shows the READ current resolution when the width of the $M_{N2}$ is fixed at 0.5µm and the length is varied from 0.5µm to 4µm. The READ current resolution is also decreased with the increment of length of $M_{N2}$. Finally (c) shows the READ current resolution when the length and width of $M_{N2}$ change simultaneously. READ current resolution is increased when the length and width of the $M_{N2}$ are increased at the same time. (d) shows the READ current level with different $M_{N2}$ sizing. About 22.48% READ current overhead is observed to improve 21% READ current resolution.
• Figure 4: READ voltage (V_READ) has a significant effect on READ current resolution. (a) shows the READ current resolution at different V_READ voltage. READ current resolution is increased with the increment of the gate voltage of $M_{N1}$. After a certain level of gate voltage increment, the READ resolution starts decreasing. (b) exhibits the READ current level at different READ voltages. As we increase the READ voltage at the gate of $M_{N1}$, the READ current level starts decreasing. Due to a weak turn-on of $M_{N2}$, the READ current level is decreased. Here is an interesting thing to notice, as we increase the gate voltage of $M_{N1}$ the overall READ current level is decreased. As a result, the READ current resolution is increased with overall READ current optimization.
• Figure 5: READ device $M_{N2}$ plays an important role to make READ current resolution adaptable at run time. The body of $M_{N2}$ is scaled to enhance the resolution with READ power overhead. (a) shows the body biasing effect on READ current resolution. About 15% resolution can be enhanced with body biasing. (b) illustrates the READ current level at different biasing voltages. The READ current is increased with the increment of body biasing of $M_{N2}$.