A Comparison of Quantum Compilers using a DAG-based or phase polynomial-based Intermediate Representation

TL;DR

Addressing the need for efficient quantum circuit compilation on NISQ devices, the paper compares DAG-based IRs (Qiskit, TKET) with phase-polynomial based IRs for architecture-aware synthesis. It systematically evaluates re-synthesis of trailing CNOTs, Reverse Traversal, and simulated annealing across five IBM architectures. Key findings show phase-polynomial compilation is dramatically faster and can yield fewer CNOTs on long circuits, with ParitySynth generally outperforming Steiner-GraySynth; however, for short circuits traditional DAG-based compilers can be more efficient. Supplemental algorithms offer only marginal gains and often increase runtime, indicating a need for improved phase-polynomial synthesis algorithms. These results advocate a hybrid approach and provide practical guidance for compiling medium-to-long quantum circuits.

Abstract

In the NISQ era, where quantum computing is dominated by hybrid quantum algorithms, it is important for quantum circuits to be well-optimized to reduce noise from unnecessary gates. We investigate different phase polynomial-based compilation strategies to determine the current best practices and compare them against the DAG-based Qiskit and TKET compilers. We find that phase polynomial-based compiling is very fast compared to DAG-based compiling. For long circuits, these compilers generate fewer CNOT gates than Qiskit or TKET, but for short circuits, they are quite inefficient. We also show that supplementary algorithms such as Reverse Traversal and simulated annealing might improve the generated CNOT count slightly, but the effect is negligable in most settings and generally not worth the additional compiler runtime. Instead, more sophisticated phase polynomial synthesis algorithms are needed.

Figures (19)

• Figure 1: A simplified schematic representation of a quantum compiler.
• Figure 2: A simplified schematic representation of a DAG-based compiler.
• Figure 3: A simplified schematic representation of a phase polynomial-based compiler.
• Figure 4: Example architecture-aware phase polynomial synthesis of a CCZ gate restricted to a 3-qubit line topology. The phase polynomial representation is shown in \ref{['subfig:ir']}. The resulting circuit from using naive decomposition is shown in \ref{['subfig:naive']} and using a more sophisticated approach in \ref{['subfig:full']}. The generation of gates during synthesis and how it updates the phase polynomial is shown in \ref{['subfig:ir']} and the CCZ with trailing CNOTs re-synthesized while reallocating the input qubits is shown in \ref{['subfig:prc']}.
• Figure 5: A schematic representation of the reverse traversal strategy.