Deep Photonic Networks with Arbitrary and Broadband Functionality

TL;DR

This work addresses the challenge of designing on-chip photonic components with arbitrary, broadband functionality without prohibitive computational cost. It introduces a physics-informed deep photonic network composed of custom Mach-Zehnder interferometers, enabling differentiable, rapid optimization of transfer functions to meet user-defined spectral targets. The authors demonstrate ultra-broadband 50/50 and 75/25 power splitters and a spectral duplexer, achieving near-ideal performance experimentally with low insertion loss and broad 1-dB bandwidth, and analyze robustness to fabrication variations. The framework offers a scalable path toward large-scale, broadband photonic systems with tailored phase and dispersion profiles for applications in communications, quantum information, and sensing, while minimizing the need for active tuning.

Abstract

Growing application space in optical communications, computing, and sensing continues to drive the need for high-performance integrated photonic components. Designing these on-chip systems with complex and application-specific functionality requires beyond what is possible with physical intuition, for which machine learning-based design methods have recently become popular. However, as the expensive computational requirements for physically accurate device simulations last a critical challenge, these methods typically remain limited in scalability and the optical design degrees of freedom they can provide for application-specific and arbitrary photonic integrated circuits. Here, we introduce a highly-scalable, physics-informed framework for the design of on-chip optical systems with arbitrary functionality based on a deep photonic network of custom-designed Mach-Zehnder interferometers. Using this framework, we design ultra-broadband power splitters and a spectral duplexer, each in less than two minutes, and demonstrate state-of-the-art experimental performance with less than 0.66 dB insertion loss and over 120 nm of 1-dB bandwidth for all devices. Our presented framework provides an essential tool with a tractable path towards the systematic design of large-scale photonic systems with custom and broadband power, phase, and dispersion profiles for use in multi-band optical applications including high-throughput communications, quantum information processing, and medical/biological sensing.

Figures (5)

• Figure 1: Deep photonic network architecture and components.(a) The network architecture is composed of the input stage, horizontally-cascaded and vertically-repeated custom interferometric layers, and the output couplers. Each interferometric layer consists of a combination of Mach-Zehnder interferometers and individually-optimized waveguide structures. (b) Block diagram of a Mach-Zehnder interferometer with two pairs of waveguide tapers of custom geometries and two directional couplers. $\theta_{11}$ through $\theta_{22}$ indicate the phases accumulated through each custom waveguide taper. (c) Schematic of the directional coupler with two S-bends and a 10 -long coupling section, and its 3D-FDTD simulated transmission response. (d) Schematic of an example custom waveguide taper constructed from a set of optimizable width parameters, from which the accumulated phase is calculated as a function of wavelength using the effective index. These custom waveguide tapers enable unique spectral phase profiles different from those in straight waveguides, as shown in the inset. (e) Overall structure of an example deep photonic network with cascaded interferometric layers of directional couplers and individually optimized waveguide tapers.
• Figure 2: Optimization of an example 1-input 4-output photonic network.(a) The $1 \times 4$ network structure is created with the desired number of layers, randomly-intialized custom waveguide tapers (red rectangles), and a target transmission response for input-output pairs. The mean squared error is computed from the difference between the calculated and target transfer functions, by summing over the specified wavelength range. The network parameters are trained iteratively through a backpropagation algorithm using the gradient of this error with respect to the design parameters denoted by $x$ in the custom waveguide tapers. Other network components including the directional couplers and input/output layers are not trainable. (b) Evolution of a custom waveguide taper throughout optimization of the deep photonic network, where its geometry is shown at random initialization, at iteration 20, and at the end of optimization. Fixed widths ($w_\mathrm{default}$) and trainable widths ($w_1, w_2, …, w_{\xi}$) are marked with red and blue circles along the taper, respectively. At each iteration, an additional straight waveguide of length $L_\mathrm{add}$ is inserted at the end of the custom taper in order to achieve matching $L_\mathrm{max}$ lengths for all tapers.
• Figure 3: Optimization and final simulation results of power splitter and spectral duplexer deep photonic networks. The mean squared error (MSE) versus iteration throughout optimization of (a) a 50/50 power splitter with 3 layers of MZIs (72 trainable parameters, 240 µm device length), (b) a 75/25 power splitter with 3 layers of MZIs (72 trainable parameters, 240 µm device length), and (c) a spectral duplexer with 6 layers of MZIs (144 trainable parameters, 480 µm device length). All three devices converge in several hundred iterations, within 1-2 minutes. (d)-(f) Transmission at the designated output port of each device as a function of wavelength. The evolution of this transmission through the iterative training process enables all three devices to achieve near-perfect transfer functions by the end of optimization. (g)-(i) Transmission spectra for each output during optimizations show gradual convergence to the target transfer functions indicated by the circles. The power splitters are optimized with 32 evenly-spaced wavelengths between 1400-1600 nm, and the duplexer is optimized with 21 wavelengths between 1450-1630 nm with a target cutoff at 1550 nm. Magnitude of the electric field at three different wavelengths obtained from 3D-FDTD simulations confirming broadband and flat-top operation for (j) the 50/50 power splitter, (k) the 75/25 power splitter, and (l) the spectral duplexer.
• Figure 4: Experimental measurements and fabrication tolerance analysis of deep photonic networks.(a)-(c) Measured transmission results together with transfer matrices and 3D-FDTD simulations at the output ports of the power splitters and the spectral duplexer. All three devices demonstrate agreement with simulation results over wide bandwidths with flat-top and low-loss transmission responses. (d)-(f) Transfer-matrix analysis of robustness against fabrication-induced variations for 10 nm and 20 nm over-etch and under-etch cases for the three devices. All components including directional couplers, S-bends, and waveguide tapers, are uniformly modified in simulation with the indicated etch offsets. (g)-(i) Resulting mean squared error in devices subject to over-etch and under-etch variations. With $±20$ nm modification of the waveguide widths, the resulting error typically increases by 1-2 orders of magnitude, corresponding to the changes in the simulated transfer function of the respective devices.
• Figure 5: Influence of network size on final device performance.(a) Performance of the $50/50$ power splitter deep photonic network as a function of the number of interferometric layers, which directly controls the number of trainable parameters. The plotted mean squared error includes propagation loss in the directional couplers and the S-bends extracted from their 3D-FDTD simulations. For each network size, ten different randomly-initialized devices are optimized and depicted with red circles. (b) Robustness of device performance against fabrication-induced variations with number of layers from $M=2$ through $M=10$. While increasing the number of interferometric layers initially provides better-performing devices under ideal fabrication conditions ($\Delta w=0$), longer devices perform worse under significant fabrication variations due to accumulating phase errors.