Direct data-driven control with signal temporal logic specifications
Birgit C. van Huijgevoort, Chris Verhoek, Roland Tóth, Sofie Haesaert
TL;DR
This work addresses the challenge of achieving formal STL guarantees without explicit system modeling by proposing a direct data‑driven control synthesis method for LTI systems. It leverages the Fundamental Lemma to obtain a data‑driven representation from a single input–output sequence and reformulates STL satisfaction as a MILP, enabling automatic controller synthesis that minimizes a quadratic IO cost. The approach extends to unbounded STL specifications through looping constructions and is demonstrated on car platoon and HVAC case studies, showing feasible computation times and practical viability. By eliminating the need for a full system model, the method reduces modeling errors and provides sound, provably correct control under STL constraints, with clear avenues for extension to nonlinear or noisy settings.
Abstract
Most control synthesis methods under temporal logic properties require a model of the system, however, identifying such a model can be a challenging task. In this work, we develop a direct data-driven control synthesis method for temporal logic specifications, which does not require this explicit modeling step, capable of providing certificates for the general class of linear systems. After collecting a single sequence of input-output data from the system, we construct a data-driven characterization of the behavior. Using this characterization, we synthesize a controller, such that the controlled system satisfies a (possibly unbounded) temporal logic specification. The underlying optimization problem is solved by mixed-integer linear programming. We demonstrate the applicability of the results through simulation examples.
