Modular decoding: parallelizable real-time decoding for quantum computers

TL;DR

The paper introduces modular decoding as a scalable framework for real-time quantum error decoding by partitioning the global decoding problem into independent sub-tasks that can run in parallel. The edge-vertex instance, tailored to lattice-surgery fault tolerance, leverages buffers of width $b$ to preserve the fault-distance $d$ and ensure soundness. A rigorous soundness theorem shows that, given a sufficiently large buffer and a sound local decoder, the modular approach matches offline, monolithic decoding performance, and Monte Carlo simulations (including the 15-to-1 magic-state distillation Clifford fragment) confirm that $b \approx d$ is necessary and sufficient for accuracy. Scheduling strategies (vertex-only, edge-vertex, and parallel edge-vertex) are proposed to minimize reaction time while maintaining throughput, with simulations demonstrating near-monolithic LER under practical buffer sizes. The results support modular decoding as a practical path toward real-world fault-tolerant quantum computation, scalable across topological codes and various computing paradigms.

Abstract

Universal fault-tolerant quantum computation will require real-time decoding algorithms capable of quickly extracting logical outcomes from the stream of data generated by noisy quantum hardware. We propose modular decoding, an approach capable of addressing this challenge with minimal additional communication and without sacrificing decoding accuracy. We introduce the edge-vertex decomposition, a concrete instance of modular decoding for lattice-surgery style fault-tolerant blocks which is remarkably effective. This decomposition of the global decoding problem into sub-tasks mirrors the logical-block-network structure of a fault-tolerant quantum circuit. We identify the buffering condition as a key requirement controlling decoder quality; it demands a sufficiently large separation (buffer) between a correction committed by a decoding sub-task and the data unavailable to it. We prove that the fault distance of the protocol is preserved if the buffering condition is satisfied. Finally, we implement edge-vertex modular decoding and apply it on a variety of quantum circuits, including the Clifford component of the 15-to-1 magic-state distillation protocol. Monte Carlo simulations on a range of buffer sizes provide quantitative evidence that buffers are both necessary and sufficient to guarantee decoder accuracy. Our results show that modular decoding meets all the practical requirements necessary to support real-world fault-tolerant quantum computers.

Figures (14)

• Figure 1: (a) (left) A $T$ gate is applied via magic state injection and requires a Clifford correction $S$ conditioned on the $Z$ measurement outcome on the second qubit. This measurement outcome requires the Pauli frame for $Z\otimes Z$ on the inputs. (a) (right) The protocol can be generalized to realize a generalized $T$ gate $T_P := \exp{\left(i \pi/8 P\right)}$ by applying a generalized CNOT. (b) An isometric view of a 3D logical-block network fragment corresponding to magic state injection of (a) for a $T=T_Z$ gate. The outcome dependent $S$ gate correction is not included as it can be efficiently tracked classically. The logical membrane highlighted in red closes to produce a logical outcome (the $Z$ measurement outcome of a). The interface between two logical-blocks is highlighted in green. Both membrane and interface are bookkeeping tools, neither having a physical signature. (c) A 2D top-view schematic for the edge-vertex modular decoding decomposition for the fragment of logical-block network presented in (b). The edge-vertex modular decoding decomposition first solves edge decoding tasks (c.1) using syndrome data from in neighbouring buffer regions (yellow). After edge decoding tasks are complete, vertex decoding tasks (c.2) can be solved independently, each task having boundary conditions set by neighbouring edge tasks. This scheme has very fast reaction times, as there is no significant chain of dependencies between decoding tasks. (d) In gate synthesis, arbitrary single qubit unitaries may be approximated by a sequence of $T$ gates interspersed with $\{SH, H \}$ Clifford gates and a final Clifford gate $C$ or alternatively as a sequence of generalized $T$ gates. (e) When $T$ gates are performed via magic state injection, each logical outcome $b_j$ obtained during injection may require an additional $S_j$ correction. These logical outcomes correspond to partially highlighted logical membranes represented in more detail in (b) or (c). Each of these membranes continue and branch into the past but can be efficiently summarized by the logical Pauli frame which tracks their cumulative value. As an alternative to physically implementing $S$ corrections, these may be incorporated in a Clifford frame, modifying which generalized $T$ gate is to be performed next. Specifically, each $P'_k$ is given by $P'_k := C_k P_k C_k^{\dagger}$, with $C_k := S^{b_1}_{P_1}\ldots S^{b_{k-1}}_{P_{k-1}}$. Similarly $C":= C_n C' C_n^\dagger$, which need not be physically implemented. Colored arrows illustrate when and where the logical outcomes $b_j$ are needed to condition further logical blocks.
• Figure 2: Logical blocks and logical-block network. From left to right, there are the 3-port block, identity, and lattice surgery logical blocks. By matching the ports (colored surfaces) of these blocks, we arrive at a logical-block network.
• Figure 3: (upper panel) Distance reduction of vanilla modular decoding with no buffer. In a first stage, an error with weight $\approx d/4$ (red) results in an miss-leading partial correction (green line). This leaves an updated syndrome which leads further decoding to complete a logical error (blue line). (lower panel) The same error configuration is presented. In this case, the first decoder is aware of additional buffer of syndrome information (yellow region). A similarly misleading correction (green) is no longer viable for the local decoder as it has higher weight than the actual error.
• Figure 4: The square lattice represents a syndrome graph, with vertices as check generators $\Sigma$ and edges as error generators $\mathcal{E}$ that flip the checks they are incident to. The green and grey shading illustrates a partitioning of the decoding problem into two sub-tasks $L$ (left) and $R$ (right). Errors $\epsilon$ (red lines) can span multiple components with the syndromes $\partial \epsilon$ (red dots) possibly spread accordingly. Error generators at the interface, represented by arrow edges, affect checks in both $\Sigma_L$ and $\Sigma_R$. They are included in $C_L$, a subset of the error generators $\mathcal{E}_L$ for the component which is decoded first. Doing so guarantees satisfying all check generators $\sigma \in \Sigma_L$ (vertices in the green shaded region) regardless of the future corrections $\kappa_F$. However, the committed correction $\kappa_L$ (green line) also produces an updated syndrome$\partial (\epsilon + \kappa_L)$ which may be different from $\partial \epsilon$ along the interface, as illustrated by the green dot. The second decoding sub-task takes this updated syndrome $\partial (\epsilon + \kappa_L)$ as input to produce a second correction component $\kappa_R$ (represented by the blue line). Buffers are not illustrated as they are not necessary to illustrate the notion of residual syndrome and data dependency.
• Figure 5: The figure illustrates a collection of error strings (connected error clusters) supported on $B\cup C$. The buffering condition (Def. \ref{['def:buffering_condition']}) states that low weight error clusters satisfying certain itemized requirements should not exists. Error clusters which satisfy itemized conditions (dashed green black), must have weight larger than $d$ for the buffering condition to be satisfied. The ones that do not satisfy itemized conditions (dashed red black) may have lower weight. For these, formulas identify which of the three itemized requirements is not fulfilled.

Theorems & Definitions (3)

• Definition 1
• Definition 2
• Theorem 1: Modular decoding theorem