Reconfigurable Intelligent Surface: Power Consumption Modeling and Practical Measurement Validation

TL;DR

This work addresses the practical problem of modeling RIS power consumption with realism and validation. It introduces a general framework where $P_{ ext{RIS}} = P_{ ext{static}} + P_{ ext{units}}$, with $P_{ ext{static}} = P_{ ext{control board}} + P_{ ext{total drive circuits}}$ and unit-cell power $P_{ ext{units}}$ depending on RIS type, polarization, and coding. The authors validate the model through measurements on PIN-diode, varactor-diode, and RF-switch RISs, quantifying how drive circuits, unit cells, and control DoF contribute to total power and showing linear scaling with the number of ON unit cells for PIN-based designs. They extract design insights and tradeoffs to guide low-power RIS deployments, highlighting that PIN RIS are HVAC-friendly in some regimes but unit-cell power can dominate, varactor RIS require careful drive design due to continuous phase control, and RF-switch RIS offers a compact, energy-efficient option. Overall, the paper provides a practical, measurement-backed framework for power-aware RIS optimization and deployment.

Abstract

The reconfigurable intelligent surface (RIS) has received a lot of interest because of its capacity to reconfigure the wireless communication environment in a cost- and energy-efficient way. However, the realistic power consumption modeling and measurement validation of RIS has received far too little attention. Therefore, in this work, we model the power consumption of RIS and conduct measurement validations using various RISs to fill this vacancy. Firstly, we propose a practical power consumption model of RIS. The RIS hardware is divided into three basic parts: the FPGA control board, the drive circuits, and the RIS unit cells. The power consumption of the first two parts is modeled as $P_{\text {static}}$ and that of the last part is modeled as $P_{\text {units}}$. Expressions of $P_{\text {static}}$ and $P_{\text {units}}$ vary amongst different types of RISs. Secondly, we conduct measurements on various RISs to validate the proposed model. Five different RISs including the PIN diode, varactor diode, and RF switch types are measured, and measurement results validate the generality and applicability of the proposed power consumption model of RIS. Finally, we summarize the measurement results and discuss the approaches to achieve the low-power-consumption design of RIS-assisted wireless communication systems.

Figures (17)

• Figure 1: General RIS hardware can be simply divided into three parts: the FPGA control board, drive circuits, and RIS unit cells.
• Figure 2: A flow diagram for realizing a programmable metasurface controlled by the FPGA hardware.
• Figure 3: Photograph of the fabricated $1^{\#}$ PIN-diode-based RIS. (a) A complete $16 \times 16$ RIS. (b) An $8 \times 8$ sub-RIS structure.
• Figure 4: The fabricated $1^{\#}$ PIN-diode-based RIS hardware design structure.
• Figure 5: Photograph of the $2^{\#}$ dual-polarized PIN-diode based RIS.