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A Note on Comparator-Overdrive-Delay Conditioning for Current-Mode Control

Xiaofan Cui, Guanyu Qian, Al-Thaddeus Avestruz

TL;DR

This work addresses stability of high-frequency current-mode control in the presence of comparator overdrive delay (COD) by developing comparator-overdrive-delay conditioning. It introduces a saturating integral operator and an implicit mapping, proves continuity conditions for the static current mapping, and derives sector bounds for the nonlinear dynamics along with explicit closed-form bounds on COD delay. The analysis yields a practical stability criterion in terms of $V_{\text{trig}}\tau$ and an interference bound $B$, complemented by an analytical approximation and a numerical formulation for $B$ under realistic interference. A DC--DC converter case study demonstrates how choosing $V_{\text{th}}\tau_c$ to satisfy the bound eliminates subharmonic instability under interference, providing actionable design guidance for robust high-speed current-mode control. The results collectively enable formal stability certification and design-aware selection of COD timing in sensor-interference environments.

Abstract

Comparator-overdrive-delay conditioning is a new control conditioning approach for high-frequency current-mode control. No existing literature rigorously studies the effect of the comparator overdrive delay on the current-mode control. The results in this paper provide insights into the mechanism of comparator-overdrive-delay conditioning.

A Note on Comparator-Overdrive-Delay Conditioning for Current-Mode Control

TL;DR

This work addresses stability of high-frequency current-mode control in the presence of comparator overdrive delay (COD) by developing comparator-overdrive-delay conditioning. It introduces a saturating integral operator and an implicit mapping, proves continuity conditions for the static current mapping, and derives sector bounds for the nonlinear dynamics along with explicit closed-form bounds on COD delay. The analysis yields a practical stability criterion in terms of and an interference bound , complemented by an analytical approximation and a numerical formulation for under realistic interference. A DC--DC converter case study demonstrates how choosing to satisfy the bound eliminates subharmonic instability under interference, providing actionable design guidance for robust high-speed current-mode control. The results collectively enable formal stability certification and design-aware selection of COD timing in sensor-interference environments.

Abstract

Comparator-overdrive-delay conditioning is a new control conditioning approach for high-frequency current-mode control. No existing literature rigorously studies the effect of the comparator overdrive delay on the current-mode control. The results in this paper provide insights into the mechanism of comparator-overdrive-delay conditioning.
Paper Structure (9 sections, 4 theorems, 87 equations, 1 figure)

This paper contains 9 sections, 4 theorems, 87 equations, 1 figure.

Key Result

Theorem 1

Given a constant off-time current control loop with comparator overdrive delay, if the input is a ramp with slope $m_1$ and interference function $w(t)$, the condition to guarantee the continuous static current mapping is

Figures (1)

  • Figure 1: Simulated waveforms of the inductor current and the current-sensing voltage under interference, obtained from a bottom current-sensing configuration. The left plot shows an ideal comparator with $V_{\text{th}}\tau_c = 0$, exhibiting subharmonic inductor current oscillation and instability. The right plot shows a comparator with $V_{\text{th}}\tau_c = 9.24~\text{V}\!\cdot\!\text{ns}$, where the instability is eliminated. The gray dashed line indicates the current reference, and the overdrive voltage corresponds to the region above this threshold.

Theorems & Definitions (10)

  • Theorem 1
  • proof
  • Definition 1
  • Definition 2
  • Lemma 1
  • proof
  • Lemma 2
  • proof
  • Theorem 2
  • proof