AgilePkgC: An Agile System Idle State Architecture for Energy Proportional Datacenter Servers

TL;DR

This work introduces AgilePkgC and its $PC1A$ package C-state to tackle poor energy proportionality in latency-critical datacenter servers operating at low utilization. By combining an Agile Power Management Unit, IO Standby Mode, and CLMR retention, APC achieves sub-microsecond entry/exit to a new package C-state while selectively powering shared resources (uncore, DRAM) and keeping PLLs active. Results on Intel Skylake-based servers show up to $41\%$ idle-power savings with minimal performance impact ($<0.1\%$ in average latency) across Memcached, Kafka, and MySQL workloads, highlighting the practical potential for deep, fast package C-states in future servers. Overall, APC demonstrates a viable path to significantly improve energy proportionality in microservice-dominated datacenters, with broad applicability to other server architectures.

Abstract

This paper presents the design of AgilePkgC (APC): a new C-state architecture that improves the energy proportionality of servers that operate at low utilization while running microservices of user-facing applications. APC targets the reduction of power when all cores are idle in a shallow C-state, ready to transition back to service. In particular, APC targets the power of the resources shared by the cores (e.g., LLC, network-on-chip, IOs, DRAM) which remain active while no core is active to use them. APC realizes its objective by using low-overhead hardware to facilitate sub-microsecond entry/exit latency to a new package C-state and judiciously selecting intermediate power modes for the different shared resources that offer fast transition and, yet, substantial power savings. Our experimental evaluation supports that APC holds the potential to reduce server power by up to 41% with a worst-case performance degradation of less than 0.1% for several representative workloads. Our results clearly support the research and development and eventual adoption of new deep and fast package C-states, like APC, for future server CPUs targeting datacenters running microservices.

Figures (9)

• Figure 1: Skylake server (SKX) architecture (a) SKX tiled floorplan (b) SKX tile (c) SKX voltage domains tam2018skylake.
• Figure 2: PC6 entry/exit flow.
• Figure 3: Main APC architecture components (in color).
• Figure 4: Power management flow for the $PC1A$ C-state.
• Figure 5: Impact on Memcached from enabling deep C-states ($C_{shallow}$ vs $C_{deep}$) on average and tail latency.