Accelerating Simulation of Quantum Circuits under Noise via Computational Reuse

TL;DR

Noisy quantum circuit simulations are prohibitively slow due to the need to run many trials with noise models. TQSim introduces a tree-based, memory-aware approach that partitions circuits into subcircuits and reuses intermediate states across shots, achieving up to 3.89x speedup on a single node while maintaining tight fidelity bounds. The method employs dynamic circuit partitioning (DCP), careful management of memory overhead, and robust error-bounding techniques to balance speed and accuracy across CPUs, GPUs, and multi-node HPC systems. Evaluations on 48 circuits across multiple backends and noise models show consistent performance gains with fidelity losses bounded by a few percent, enabling scalable exploration of noisy quantum algorithms and VQAs on practical hardware.

Abstract

To realize the full potential of quantum computers, we must mitigate qubit errors by developing noise-aware algorithms, compilers, and architectures. Thus, simulating quantum programs on high-performance computing (HPC) systems with different noise models is a de facto tool researchers use. Unfortunately, noisy simulators iteratively execute a similar circuit for thousands of trials, thereby incurring significant performance overheads. To address this, we propose a noisy simulation technique called Tree-Based Quantum Circuit Simulation (TQSim). TQSim exploits the reusability of intermediate results during the noisy simulation, reducing computation. TQSim dynamically partitions a circuit into several subcircuits. It then reuses the intermediate results from these subcircuits during computation. Compared to a noisy Qulacs-based baseline simulator, TQSim achieves a speedup of up to 3.89x for noisy simulations. TQSim is designed to be efficient with multi-node setups while also maintaining tight fidelity bounds.

Figures (19)

• Figure 1: Simulation times (in seconds) for ideal and noisy 15-qubit Quantum Fourier Transform (QFT) circuits, using two 16-core Intel® Xeon® 6130 processors. Noisy simulations are 170$\times$ to 335$\times$ slower than ideal ones.
• Figure 2: Noisy circuits and potential reuse of the intermediate states. (a) Ideal simulation and possible noise operators. (b) Four noisy circuits are generated from the original circuit, and their noisy-version resulting distributions. (c) Reuse the intermediate state after gate B and the new noisy-version resulting distributions. Note that the noise operator Y in $C_4$ from (b) has been replaced by a noise operator X in (c). This illustrates the source of loss in accuracy.
• Figure 3: Ideal and noisy simulation of the Bernstein-Vazirani circuit. (a) 3-qubit ideal circuit. (b) Ideal simulation. (c) Noisy circuit modeled with a depolarizing noise model. It should be noted that TQSim supports a wide range of noise models. The evaluation for these models is showcased in Section \ref{['noise_models_evaluation']}. (d) Noisy simulation.
• Figure 4: Memory overhead of density matrix vs. statevector simulators: On El Capitan, the world's top-1 supercomputer, the density matrix simulator handles fewer than 25 qubits, while the statevector simulator manages over 30 qubits on a personal laptop with 16GB of memory.
• Figure 5: Simulation times and memory overhead for noisy BV circuits with 10 to 28 qubits. Each circuit involves 8192 shots and runs on dual 16-core Intel® Xeon® 6130 processors, having 192GB system memory. Both simulation time and memory overhead exhibit exponential growth. However, well before memory usage approaches system limits, noisy simulation times extend to hundreds of hours, establishing simulation time as the primary bottleneck for noisy tasks.