Higher-dimensional Euclidean and non-Euclidean structures in planar circuit quantum electrodynamics

TL;DR

The paper demonstrates that planar circuit QED architectures can simulate higher-dimensional Euclidean and non-Euclidean lattices by employing symmetric q-leg capacitors with q>3, yielding line-graph structures (n-dimensional zeolites) that host flat bands due to geometric frustration. It derives exact spectral relations linking line-graph adjacency to signless Laplacian and Laplacian properties, establishes the flat-band fraction and its hyperbolic exponential convergence, and discusses embedding constraints and positive-curvature realizations (e.g., {5,3} on S^2 with the icosidodecahedron line graph). The results provide a rigorous framework for realizing and probing complex connectivity and flat-band physics in programmable cQED platforms, with concrete experimental directions such as dodecahedral layouts and spatially varying coordination to simulate curvature. This work broadens the toolkit for metamaterials and quantum simulation by enabling higher-dimensional and curved-space geometries in planar superconducting circuits.

Abstract

We show that a recent proposal for simulating planar hyperbolic lattices with circuit quantum electrodynamics can be extended to accommodate also higher dimensional lattices in Euclidean and non-Euclidean spaces if one allows for circuits with more than three polygons at each vertex. The quantum dynamics of these circuits, which can be constructed with present-day technology, are governed by effective tight-binding Hamiltonians corresponding to higher-dimensional Kagomé-like structures ($n$-dimensional zeolites), which are well known to exhibit strong frustration and flat bands. We analyze the relevant spectra of these systems and derive an exact expression for the fraction of flat-band states. Our results expand considerably the range of non-Euclidean geometry realizations with circuit quantum electrodynamics.

Figures (7)

• Figure 1: Proposed planar $q$-leg capacitive devices coupling the resonators for (a) $q=4$ and (b) $q=5$. We are building these circuits using standard micro-fabrication techniques. In the 4-leg capacitor (a), for instance, the capacitance between any pair of legs is 374pF, with deviations smaller than 0.01pF. The generic case with $q$ symmetrical legs follows analogously as a star-shaped configuration with $q$ leaves. See the Appendix \ref{['apa']} further construction details.
• Figure 2: Some examples of tilings with $q=4$ and their associated line graphs. (a) The usual square $\{4,4\}$ tiling of $\mathbb{E}^2$ and (b) its associated line graph, which is equivalent to a single layer of corner-sharing tetrahedra ($3$-zeolites) in $\mathbb{E}^3$, with the blue and yellow vertices located in two parallel planes and seen from a perpendicular viewpoint. (c) The hexagonal $\{6,4\}$ tiling of $\mathbb{H}^2$ and (d) its associated line graph, which can be viewed in an analogous way: a single layer of corner-sharing tetrahedra in $\mathbb{H}^3$ (or in $\mathbb{H}^2\times \mathbb{R}$), viewed from above. Note that a layered geometrical realization of the line graphs of (b) and (d) are only available for $\{p,4\}$ tilings with even $p$, since the disposition of the blue and yellow vertices in two parallel planes is only possible if the line graph is bipartite. We employ here Schläfli's $\{p,q\}$-notation for two-dimensional regular tilings (see text).
• Figure 3: The $\{3,4\}$ tiling of $\mathbb{S}^2$. Left: the octahedron in $\mathbb{E}^3$ and its associated planar graph, which can be implemented as a circuit with symmetrical 4-leg capacitors. Right: the cuboctahedron (rectified octahedron) as a schematic representation of the the octahedron line graph, which corresponds to 6 corner-sharing tetrahedra. Each square face of the cuboctahedron is in fact a tetrahedra, but only one is depicted for simplicity. Such structure does not exist in $\mathbb{E}^3$, but can be embedded in $\mathbb{E}^5$, see the text.
• Figure 4: A $\{5,3\}$ tiling of $\mathbb{S}^2$. Left: the dodecahedron in $\mathbb{E}^3$ and its planar graph, which can be implemented as a circuit with symmetrical 3-leg capacitors. Right: the associated line graph, which is realized as the triangular faces of an icosidodecahedron in $\mathbb{E}^3$, and its respective 30-vertex graph. The dashed line corresponds to one of the ten even cycles associated with the flat band in the spectra of the icosidodecahedron graph.
• Figure 5: Spectra of the line-graph adjacency matrix $A_{LG}$ for some $\{p,q\}$-layouts, with the red vertical line highlighting the predicted flat-band endpoint. Left: a layout of 4 concentric rings of the $\{5,4\}$ hyperbolic tilling. The associated line graph has 681 vertices. The predicted flat-band fraction is $f = 0.297$. Note the gap between the flat band and the rest of the spectra, a property of all layouts with odd $p$. Since $p=5$, this circuit cannot be interpreted as a layer of corner-sharing tetrahedra as in Fig. \ref{['fig1']}. Right: a layout of 4 concentric rings of the $\{6,4\}$ hyperbolic tilling of Fig. \ref{['fig1']}. The associated line graph has 2,233 vertices. The predicted flat-band fraction is $f = 0.226$. For even $p$, there is no gap between the flat band and the rest of the spectra.