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Efficient algorithms for collecting the statistics of large-scale IP address data

Hui Liu, Yi Cao, Zehan Cai, Hua Mao, Jie Chen

TL;DR

The paper addresses the challenge of efficiently collecting statistics from large-scale IP address data, focusing on counting and ranking the most frequent IPs. It introduces two memory-block based strategies, TLMB and SSMB, that map the four-dimensional IP space into memory blocks to minimize collisions and enable parallel computation. Through memory-use and time-complexity analyses and extensive experiments on synthetic and real-world data, TLMB achieves the best time performance while SSMB offers stable memory usage across dataset sizes, both outperforming hash-mapping and conventional IP-mapping baselines. These results demonstrate scalable, practical applicability for real-world network traffic measurement and management tasks.

Abstract

Compiling the statistics of large-scale IP address data is an essential task in network traffic measurement. The statistical results are used to evaluate the potential impact of user behaviors on network traffic. This requires algorithms that are capable of storing and retrieving a high volume of IP addresses within time and memory constraints. In this paper, we present two efficient algorithms for collecting the statistics of large-scale IP addresses that balance time efficiency and memory consumption. The proposed solutions take into account the sparse nature of the statistics of IP addresses while building the hash function and maintain a dynamic balance among layered memory blocks. There are two layers in the first proposed method, each of which contains a limited number of memory blocks. Each memory block contains 256 elements of size $256 \times 8$ bytes for a 64-bit system. In contrast to built-in hash mapping functions, the proposed solution completely avoids expensive hash collisions while retaining the linear time complexity of hash-based solutions. Moreover, the mechanism dynamically determines the hash index length according to the range of IP addresses, and can balance the time and memory constraints. In addition, we propose an efficient parallel scheme to speed up the collection of statistics. The experimental results on several synthetic datasets show that the proposed method substantially outperforms the baselines with respect to time and memory space efficiency.

Efficient algorithms for collecting the statistics of large-scale IP address data

TL;DR

The paper addresses the challenge of efficiently collecting statistics from large-scale IP address data, focusing on counting and ranking the most frequent IPs. It introduces two memory-block based strategies, TLMB and SSMB, that map the four-dimensional IP space into memory blocks to minimize collisions and enable parallel computation. Through memory-use and time-complexity analyses and extensive experiments on synthetic and real-world data, TLMB achieves the best time performance while SSMB offers stable memory usage across dataset sizes, both outperforming hash-mapping and conventional IP-mapping baselines. These results demonstrate scalable, practical applicability for real-world network traffic measurement and management tasks.

Abstract

Compiling the statistics of large-scale IP address data is an essential task in network traffic measurement. The statistical results are used to evaluate the potential impact of user behaviors on network traffic. This requires algorithms that are capable of storing and retrieving a high volume of IP addresses within time and memory constraints. In this paper, we present two efficient algorithms for collecting the statistics of large-scale IP addresses that balance time efficiency and memory consumption. The proposed solutions take into account the sparse nature of the statistics of IP addresses while building the hash function and maintain a dynamic balance among layered memory blocks. There are two layers in the first proposed method, each of which contains a limited number of memory blocks. Each memory block contains 256 elements of size bytes for a 64-bit system. In contrast to built-in hash mapping functions, the proposed solution completely avoids expensive hash collisions while retaining the linear time complexity of hash-based solutions. Moreover, the mechanism dynamically determines the hash index length according to the range of IP addresses, and can balance the time and memory constraints. In addition, we propose an efficient parallel scheme to speed up the collection of statistics. The experimental results on several synthetic datasets show that the proposed method substantially outperforms the baselines with respect to time and memory space efficiency.

Paper Structure

This paper contains 24 sections, 4 figures, 8 tables, 2 algorithms.

Table of Contents

  1. Introduction
  2. Related work
  3. Classical sort techniques
  4. Accelerating large-scale sorting techniques
  5. Parallel hardware architectures
  6. Proposed method
  7. Problem Formulation
  8. IP Address Statistics Task
  9. IP Usage Storage and Retrieval Strategies for the Four-dimensional Sparse Matrix
  10. First method: TLMB
  11. Second method: SSMB
  12. Memory Use and Complexity Analysis
  13. Parallel computation optimization techniques
  14. Parallel computation mechanism of TLMB
  15. Parallel computation mechanism of SSMB
  16. ...and 9 more sections

Figures (4)

  • Figure 1: Example of a memory block of size $256 \times 8$ bytes containing 256 elements.
  • Figure 2: An example of the mapping relationships between memory blocks and an IP address.
  • Figure 3: The computational costs of the proposed TLMB and SSMB methods with different $k$ values. (a) TLMB and (b) SSMB.
  • Figure 4: The memory uses of the proposed TLMB and SSMB methods with different $k$ values. (a) TLMB and (b) SSMB.