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Machine-Learning Assisted Optimization Strategies for Phase Change Materials Embedded within Electronic Packages

Meghavin Bhatasana, Amy Marconnet

TL;DR

This work investigates embedding metallic phase change materials (PCMs) within the silicon device layer to mitigate peak temperatures and transient fluctuations in high-power electronics. It introduces a machine-learning aided optimization framework that leverages ParaPower, a resistance-network thermal model, to rapidly evaluate geometry and thermophysical properties of embedded PCMs, comparing direct optimization methods with neural-network surrogates. Across fixed-geometry and multi-parameter optimization scenarios, Solder 174 consistently provides superior thermal performance, and melt-temperature optimization reveals power-dependent shifts in the optimal $T_m$ for minimizing $T_{o-max}$ versus $T_{osc}$. The study demonstrates that ML-assisted optimization can converge to design optima more quickly than exhaustive manual sweeps, with NN surrogates offering reusability at the expense of training time, and highlights a promising path toward 3D embedded PCM architectures for advanced electronic packaging.

Abstract

Leveraging the latent heat of phase change materials (PCMs) can reduce the peak temperatures and transient variations in temperature in electronic devices. But as the power levels increase, the thermal conduction pathway from the heat source to the heat sink limits the effectiveness of these systems. In this work, we evaluate embedding the PCM within the silicon device layer of an electronic device to minimize the thermal resistance between the source and the PCM to minimize this thermal resistance and enhance the thermal performance of the device. The geometry and material properties of the embedded PCM regions are optimized using a combination of parametric and machine learning algorithms. For a fixed geometry, considering commercially available materials, Solder 174 significantly outperforms other organic and metallic PCMs. Also with a fixed geometry, the optimal melting points to minimize the peak temperature is higher than the optimal melting point to minimize the amplitude of the transient temperature oscillation, and both optima increase with increasing heater power. Extending beyond conventional optimization strategies, genetic algorithms and particle swarm optimization with and without neural network surrogate models are used to enable optimization of many geometric and material properties. For the test case evaluated, the optimized geometries and properties are similar between all ML-assisted algorithms, but the computational time depends on the technique. Ultimately, the optimized design with embedded phase change materials reduces the maximum temperature rise by 19% and the fluctuations by up to 88% compared to devices without PCM.

Machine-Learning Assisted Optimization Strategies for Phase Change Materials Embedded within Electronic Packages

TL;DR

This work investigates embedding metallic phase change materials (PCMs) within the silicon device layer to mitigate peak temperatures and transient fluctuations in high-power electronics. It introduces a machine-learning aided optimization framework that leverages ParaPower, a resistance-network thermal model, to rapidly evaluate geometry and thermophysical properties of embedded PCMs, comparing direct optimization methods with neural-network surrogates. Across fixed-geometry and multi-parameter optimization scenarios, Solder 174 consistently provides superior thermal performance, and melt-temperature optimization reveals power-dependent shifts in the optimal for minimizing versus . The study demonstrates that ML-assisted optimization can converge to design optima more quickly than exhaustive manual sweeps, with NN surrogates offering reusability at the expense of training time, and highlights a promising path toward 3D embedded PCM architectures for advanced electronic packaging.

Abstract

Leveraging the latent heat of phase change materials (PCMs) can reduce the peak temperatures and transient variations in temperature in electronic devices. But as the power levels increase, the thermal conduction pathway from the heat source to the heat sink limits the effectiveness of these systems. In this work, we evaluate embedding the PCM within the silicon device layer of an electronic device to minimize the thermal resistance between the source and the PCM to minimize this thermal resistance and enhance the thermal performance of the device. The geometry and material properties of the embedded PCM regions are optimized using a combination of parametric and machine learning algorithms. For a fixed geometry, considering commercially available materials, Solder 174 significantly outperforms other organic and metallic PCMs. Also with a fixed geometry, the optimal melting points to minimize the peak temperature is higher than the optimal melting point to minimize the amplitude of the transient temperature oscillation, and both optima increase with increasing heater power. Extending beyond conventional optimization strategies, genetic algorithms and particle swarm optimization with and without neural network surrogate models are used to enable optimization of many geometric and material properties. For the test case evaluated, the optimized geometries and properties are similar between all ML-assisted algorithms, but the computational time depends on the technique. Ultimately, the optimized design with embedded phase change materials reduces the maximum temperature rise by 19% and the fluctuations by up to 88% compared to devices without PCM.

Paper Structure

This paper contains 14 sections, 1 equation, 8 figures, 7 tables.

Figures (8)

  • Figure 1: Schematic of the PCM channels (light purple) in the silicon chip (gray). The inset illustrates the 2D cross-section sectioned for analysis based on symmetry (insulated) boundary conditions. Thus the focus is on half of a single channel segment consisting of the silicon, half of a single PCM channel, and an alumina (gold) insulating layer. Heat is generated at the silicon-alumina interface with a square wave pattern with an on time of 0.5 s. In these studies, the thermophysical properties of the PCM and the channel height $H$ and width $W$ are varied, while all other thermophysical properties and geometrical parameters are fixed.
  • Figure 2: Predicted maximum temperature in (a) the silicon device layer and (b) the PCM for a square wave heat input of $q"_0$ = 75 k W □ m from COMSOL (solid lines) compared to ParaPower (dashed lines) for the channel filled with PureTemp60. (c)Predicted temperature distribution for the ParaPower model at 9.75 s, at which temperature in the system is highest (indicated with dashed red line in panels (a-b)). (d) Difference in spatial temperature distribution between ParaPower and COMSOL predictions at 9.75 s. ParaPower predictions on average are 1.42 higher than COMSOL. The solid red lines in (c-d) indicate the location where heat is generated.
  • Figure 3: Maximum temperature in the system responding to a square-wave heat input of amplitude $q" =$100 k W □ m and on time of 0.5 s for first 20 seconds of simulation time. Evaluation metrics and their associated values are highlighted for Solder 174 (orange line) compared to the case without PCM (unaltered Si, blue line). Note, although the total simulation time was 1000 seconds (1000 cycles), the system reaches a steady periodic response within 20 seconds (20 cycles). In some cases, longer transient periods are observed and up to 1000 cycles are used to confirm a steady periodic response.
  • Figure 4: Flowchart detailing the (a) particle swarm optimization and (b) genetic algorithm for optimizing parameters of the system. In both methods, either the the algorithm directly integrates with ParaPower (in which case the algorithm follows just the solid outlined boxes) or first a neural network is trained based on a selected training set of data from ParaPower (illustrated by the the dashed outlined boxes).
  • Figure 5: (a) Maximum chip temperature ($T_{o-max}$), (b) chip temperature oscillations ($T_{osc}$), (c) time to 85 $\Delta t_{85}$, and (d) oscillation in the PCM melt fraction ($\Delta \Phi_{melt}$) for commercially-available PCMs for a fixed channel geometry with a cyclic heat input of 100 k W □ m compared to a solid silicon chip (silver bar labelled Si). The seven PCMs, described in Table \ref{['tab:PCMs']}, are arranged in order of increasing melting temperature. Note that the 7th PCM (Solder 174) never reaches 85 .
  • ...and 3 more figures