Interleaving: Modular architectures for fault-tolerant photonic quantum computing

TL;DR

This paper tackles scaling fault-tolerant photonic quantum computing by shifting from static qubit arrays to modular, memory-enabled fusion-based architectures. It introduces interleaving modules that combine one resource-state generator, a handful of fusion devices, and fixed-time optical delays to dramatically enlarge the effective qubit count while maintaining universal fault tolerance via surface codes and lattice surgery. The key contributions include two interleaving schemes (trivial and rastered), a universal module design with non-Clifford capability, and a thorough analysis of loss thresholds, linear space-time trade-offs, and connectivity options such as periodic boundary conditions and stellated patches. The findings show that with realistic fiber delays (e.g., 1–2 km) and nanosecond RSG cycles, a single module can emulate thousands of static qubits, enabling scalable, modular photonic quantum computation with practical memory and routing requirements.

Abstract

Useful fault-tolerant quantum computers require very large numbers of physical qubits. Quantum computers are often designed as arrays of static qubits executing gates and measurements. Photonic qubits require a different approach. In photonic fusion-based quantum computing (FBQC), the main hardware components are resource-state generators (RSGs) and fusion devices connected via waveguides and switches. RSGs produce small entangled states of a few photonic qubits, whereas fusion devices perform entangling measurements between different resource states, thereby executing computations. In addition, low-loss photonic delays such as optical fiber can be used as fixed-time quantum memories simultaneously storing thousands of photonic qubits. Here, we present a modular architecture for FBQC in which these components are combined to form "interleaving modules" consisting of one RSG with its associated fusion devices and a few fiber delays. Exploiting the multiplicative power of delays, each module can add thousands of physical qubits to the computational Hilbert space. Networks of modules are universal fault-tolerant quantum computers, which we demonstrate using surface codes and lattice surgery as a guiding example. Our numerical analysis shows that in a network of modules containing 1-km-long fiber delays, each RSG can generate four logical distance-35 surface-code qubits while tolerating photon loss rates above 2% in addition to the fiber-delay loss. We illustrate how the combination of interleaving with further uses of non-local fiber connections can reduce the cost of logical operations and facilitate the implementation of unconventional geometries such as periodic boundaries or stellated surface codes. Interleaving applies beyond purely optical architectures, and can also turn many small disconnected matter-qubit devices with transduction to photons into a large-scale quantum computer.

Figures (17)

• Figure 1: Overview of FBQC and interleaving. (a) In circuit-based quantum computing (CBQC), computations are described by quantum circuits, typically containing two-qubit gates and measurements for error correction. (b) These are implemented by consecutively executing layers of gates and measurements in arrays of physical qubits. For error correction with topological codes such as surface codes, these qubits are typically arranged on 2D grids, and all physical gates involve only neighboring qubits. (c) A fusion-based quantum computation is described by a fusion graph, in which each vertex is a few-qubit resource state, each edge a two-qubit fusion instruction, and each half-edge a single-qubit measurement. In fault-tolerant quantum computation with topological codes, fusion graphs are typically 2+1-dimensional, where 2D slices roughly correspond to layers of gates and measurements executed by a 2D array of qubits in CBQC. (d) The hardware components in FBQC are resource-state generators (RSGs) producing resource states at periodic time intervals called RSG cycles (), fusion devices performing single- and two-qubit measurements and $n$-delays that store photons for $n$. These components are connected via waveguides and switches that transport and reroute photons. (e) 2D arrays of $n_x \times n_y$ modules containing an RSG and a 1-delay can implement fusion graphs with 2D slices of size $n_x \times n_y$. (f) Augmenting these modules with an $L$-delay, an $L^2$-delay and a few switches turns them into interleaving modules capable of producing fusion graphs with $L^2$ times larger 2D slices, but $L^2$ times more slowly, effectively slowing down the generation of slices in exchange for more physical qubits. Values of $L^2>1000$ are achievable with realistic physical components.
• Figure 2: Simple cubic fusion graphs and assignment of interleaving coordinates. (a) The fusion graph is a simple cubic lattice in which each vertex corresponds to a 6-ring resource state. This resource state consists of six photonic qubits which are labeled $x^\pm$, $y^\pm$ and $z^\pm$, according to the six directions of the cubic fusion graph. Each edge of the graph corresponds to a fusion. (b) 6-ring fusion graphs can be partitioned into 2D slices perpendicular to the $z$ direction. In this example, each slice consists of 64 resource states. (c) Interleaving coordinates $(g,t)$ are assigned to each resource state in the fusion graph to determine the RSG $g$ that will produce this resource state and the RSG cycle $t$ during which it will be produced. In the trivial case, 64 RSGs are used to produce one 2D slice in every RSG cycle, which is compatible with the hardware modules shown in Fig. \ref{['fig:l1modules']}a. (d) Alternatively, when interleaving with rastering length $L=4$, the fusions instructions of each 2D slice can be produced in 16 RSG cycles using only four RSGs. The hardware modules capable of these operations are shown in Fig. \ref{['fig:bulkmodule']}.
• Figure 3: (a) Network of modules capable of producing one 2D slice of size $n_x \times n_y$ of a cubic 6-ring fusion graph in every RSG cycle, as described in Fig. \ref{['fig:fusiongraph']}c. (b) If the 1-delay of these modules is replaced by a $k$-delay, then these modules can produce a larger fusion graph consisting of $k$ disconnected cuboids that each have 2D slices of size $n_x \times n_y$.
• Figure 4: Interleaving modules that are compatible with the interleaving coordinate assignment shown in Fig. \ref{['fig:fusiongraph']}d. An array of $n_x \times n_y$ modules can produce a fusion graph with 2D slices of size $L \cdot n_x \times L \cdot n_y$, where each slice is produced in $L^2$ RSG cycles.
• Figure 5: Alternative assignment of interleaving coordinates in which all networked fusions are instantaneous fusions.