A semi-agnostic ansatz with variable structure for quantum machine learning

TL;DR

The approach, called VAns (Variable Ansatz), applies a set of rules to both grow and remove quantum gates in an informed manner during the optimization, which is ideally suited to mitigate trainability and noise-related issues by keeping the ansatz shallow.

Abstract

Quantum machine learning -- and specifically Variational Quantum Algorithms (VQAs) -- offers a powerful, flexible paradigm for programming near-term quantum computers, with applications in chemistry, metrology, materials science, data science, and mathematics. Here, one trains an ansatz, in the form of a parameterized quantum circuit, to accomplish a task of interest. However, challenges have recently emerged suggesting that deep ansatzes are difficult to train, due to flat training landscapes caused by randomness or by hardware noise. This motivates our work, where we present a variable structure approach to build ansatzes for VQAs. Our approach, called VAns (Variable Ansatz), applies a set of rules to both grow and (crucially) remove quantum gates in an informed manner during the optimization. Consequently, VAns is ideally suited to mitigate trainability and noise-related issues by keeping the ansatz shallow. We employ VAns in the variational quantum eigensolver for condensed matter and quantum chemistry applications, in the quantum autoencoder for data compression and in unitary compilation problems showing successful results in all cases.

Figures (14)

• Figure 1: Schematic diagram of the VAns algorithm. a) VAns explores the hyperspace of architectures of parametrized quantum circuits to create short depth ansatzes for VQA applications. VAns takes a (potentially non-trivial) initial circuit (step I) and optimizes its parameters until convergence. At each step, VAns inserts blocks of gates into the circuit which are initialized to the identity (indicated in a box in the figure), so that the ansatzes at contiguous steps belong to an equivalence class of circuits leading to the same cost value (step II). VAns then employs a classical algorithm to simplify the circuit by eliminating gates and finding the shortest circuit (step II to III). The ovals represent subspaces of the architecture hyperspace connected through VAns. While some regions may be smoothly connected by placing identity resolutions, VAns can also explore regions that are not smoothly connected via a gate-simplification process. VAns can either reject (step IV) or accept (step V) modifications in the circuit structure. Here $Z$ ($X$) indicates a rotation about the $z$ ($x$) axis. b) Schematic representation of the cost function value versus the number of iterations for a typical VAns implementation which follows the steps in a).
• Figure 2: Examples of initial circuit configurations for VAns. VAns take as input an initial structure for the parametrized quantum circuit. In (a) we depict a separable product ansatz which generates no entanglement between the qubits. On the other hand, (b) shows two layers of a shallow alternating Hardware Efficient Ansatz where neighboring qubits are initially entangled. Here $Z$ ($X$) indicates a rotation about the $z$ ($x$) axis.
• Figure 3: Circuits from the dictionary $\mathcal{D}$ used during the Insertion steps. Here we show two types of the parametrized gate sequences composed of CNOTs and rotations about the $z$ and $x$ axis. Specifically, one obtains the identity if the rotation angles are set to zero. Using the circuit in (a), one inserts a general unitary acting on a given qubit, while the circuit in (b) entangles the two qubits it acts upon.
• Figure 4: Rules for the Simplification steps. (a) Commutation rules used by VAns to move gates in the circuit. As shown, one can commute a CNOT with a rotation $Z$ ($X$) about the $z$ ($x$) axis acting on the control (target) qubit. (b) Example of simplification rules used by VAns to reduce the circuit depth. Here we assume that the circuit is initialized to $|0\rangle^{\otimes n}$.
• Figure 5: Circuit obtained from VAns. Shown is a non-trivial circuit structure that can be obtained by VAns using the Insertion and Simplification steps and the gate dictionary in Fig. \ref{['fig:blocks']}.