Hoare meets Heisenberg: A Lightweight Logic for Quantum Programs
Aarthi Sundaram, Robert Rand, Kartik Singhal, Brad Lackey
TL;DR
This work presents a lightweight Hoare-style logic for quantum programs grounded in Gottesman’s stabilizer/semi-classical semantics, enabling efficient reasoning about Clifford circuits and stabilizer states. It extends to universal quantum computation via additive predicates, incorporating the $T$ gate, Toffoli, and gate-injection circuits, while also handling measurement, separability, and error-correcting codes within the same framework. The methodology yields linear-time postcondition inference for Clifford regions and provides practical tools for verifying ancilla disposal, separability, and code transversality, with explicit examples on Deutsch’s algorithm and the Steane code. However, full generality incurs exponential blowups tied to the number of non-Clifford gates, underlining a trade-off between expressiveness and automation in verifying universal quantum circuits. The work also outlines future directions toward quantum channels, code-switching, and extended measurement techniques, aiming to broaden applicability beyond stabilizer-based reasoning.
Abstract
We show that Gottesman's (1998) semantics for Clifford circuits based on the Heisenberg representation gives rise to a lightweight Hoare-like logic for efficiently characterizing a common subset of quantum programs. Our applications include (i) certifying whether auxiliary qubits can be safely disposed of, (ii) determining if a system is separable across a given bipartition, (iii) checking the transversality of a gate with respect to a given stabilizer code, and (iv) computing post-measurement states for computational basis measurements. Further, this logic is extended to accommodate universal quantum computing by deriving Hoare triples for the $T$-gate, multiply-controlled unitaries such as the Toffoli gate, and some gate injection circuits that use associated magic states. A number of interesting results emerge from this logic, including a lower bound on the number of $T$ gates necessary to perform a multiply-controlled $Z$ gate.
