Sensifi: A Wireless Sensing System for Ultra-High-Rate Applications

TL;DR

Sensifi introduces a WiFi-based solution for ultra-high-rate sensing, addressing timestamp overhead, energy efficiency, and time synchronization in a live, scalable multi-node setting. It combines lossless timestamp-interval encoding, two energy-saving idle/alert strategies, and protocol-stack optimizations (including UDP-bypass and blocking calls) to sustain high sampling rates (up to $500\,ksps$ per node) with sub-$\mu s$ time synchronization. Key results show substantial payload reductions (up to $>20\times$) and improved sampling stability, alongside a modular low-power hardware design using the ADXL1004/AD4008 pair and a CYW54907-based platform. The work lays groundwork for scalable, real-time high-rate sensing in aerospace, structural health, and industrial contexts, and points to future enhancements via 802.11ax features and large-scale testbeds.

Abstract

Wireless Sensor Networks (WSNs) are being used in various applications such as structural health monitoring and industrial control. Since energy efficiency is one of the major design factors, the existing WSNs primarily rely on low-power, low-rate wireless technologies such as 802.15.4 and Bluetooth. In this paper, we strive to tackle the challenges of developing ultra-high-rate WSNs based on 802.11 (WiFi) standard by proposing Sensifi. As an illustrative application of this system, we consider vibration test monitoring of spacecraft and identify system design requirements and challenges. Our main contributions are as follows. First, we propose packet encoding methods to reduce the overhead of assigning accurate timestamps to samples. Second, we propose energy efficiency methods to enhance the system's lifetime. Third, we reduce the overhead of processing outgoing packets through network stack to enhance sampling rate and mitigate sampling rate instability. Fourth, we study and reduce the delay of processing incoming packets through network stack to enhance the accuracy of time synchronization among nodes. Fifth, we propose a low-power node design for ultra-high-rate applications. Sixth, we use our node design to empirically evaluate the system.

Figures (19)

• Figure 1: (a) The operational phases of the overall system. (b) The operational phases of nodes. Since the transition time of nodes varies depending on energy efficiency configuration, transition periods exist from the overall system's perspective. These transition periods are named Idle to Alert (I2A) and Alert to Sampling (A2S).
• Figure 2: (a) A system with long intervals between Sampling phases. (b) A system with short intervals between Sampling phases.
• Figure 3: Sample collection from ADC. Both the conversion time of ADC and sample transfer time affect inter-sample intervals. Also, further variations of inter-sample intervals occur when the processor switches between tasks.
• Figure 4: Distribution of sampling interval under different sample frequency. (a): Sampling rate $\textrm{100\:k}$. (b): Sampling rate $\textrm{500\:k}$. For these experiments, the only task being run by the nodes is sampling. Nearly $\mathrm{99\%}$ of the intervals are within four to six classes, and the remaining $\textrm{1\%}$ of the intervals are distributed among several classes. It is worth mentioning that we observed similar distributions versus temperature variations.
• Figure 5: Packet formats of various timestamp encoding methods. (a) Packet format with an $\textrm{8\:byte}$ timestamp per sample (Baseline-8B). (b) Packet format with an $\textrm{6\:byte}$ timestamp per sample (Baseline-6B). (c) Packet format using IENC. (d) Packet format using OENC where $\textrm{2\:bytes}$ are assigned to each outlier. (e) Packet format with D-OENC where $\textrm{1\:byte}$ is assigned to each outlier.