Toward an Abstract Model of Programmable Data Plane Devices
Debobroto Das Robin, Javed I. Khan
TL;DR
The paper addresses the lack of a common, hardware-agnostic abstraction for programmable data plane devices by introducing the Abstract Virtual Switch (AVS). AVS is an EFSM-based, modular hardware abstraction that decomposes the data plane into 11 components (e.g., $Port_{In}$, $PR_{In}$, $BE_{In}$, $MAU_{In}$, $DPR_{In}$, $BRE$, $PR_{E}$, $MAU_{E}$, $DPR_{E}$, $S$, $Port_{E}$) and couples compile-time programmability (CTP) with run-time configurability (RTC) via a Data Plane Program (DPP). It extends prior efforts (PSA/P4 lineage) by adding buffer and scheduler programmability, formal workflow through EFSMs, and a framework to compare programmability across devices with a formal feature matrix. The paper also demonstrates AVS through motivating use cases such as modular design, virtualization, testing, and network-function modeling, arguing that AVS supports hardware innovation while enabling portable, verifiable, and optimizable data-plane programs. Overall, AVS provides a structured, hardware-agnostic blueprint to design, map, test, and benchmark programmable data plane devices, with potential for eventual hardware realization from the abstraction layer.
Abstract
SDN divides the networking landscape into 2 parts: control and data plane. SDN expanded it's foot mark starting with OpenFlow based highly flexible control plane and rigid data plane. Innovation and improvement in hardware design and development is bringing various new architectures for data plane. Data plane is becoming more programmable then ever before. A common abstract model of data plane is required to develop complex application over these heterogeneous data plane devices. It can also provide insight about performance optimization and bench-marking of programmable data plane devices. Moreover, to understand and utilize data plane's programmability, a detailed structural analysis and an identifiable matrix to compare different devices are required. In this work, an improved and structured abstract model of the programmable data plane devices is presented and features of its components are discussed in detail. Several commercially available programmable data plane devices are also compared based on those features.