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MemTorch: An Open-source Simulation Framework for Memristive Deep Learning Systems

Corey Lammie, Wei Xiang, Bernabé Linares-Barranco, Mostafa Rahimi Azghadi

TL;DR

MemTorch addresses the challenge of simulating memristive deep learning systems with realistic device non-idealities by providing a configurable, open-source co-simulation framework that integrates with PyTorch. The approach combines modular memristor crossbar representations (1T1R/0T1R), tile-based mapping, and multiple device models (e.g., linear ion drift, VTEAM, PKU RRAM) with stochastic non-idealities to study accuracy and robustness. Key contributions include a C++/CUDA/Python implementation, crossbar peripheral modeling, and demonstration of CIFAR-10/classification performance under device variability and faults. The framework enables rapid exploration of device physics and circuit-level constraints, supporting research and hardware-aware ML development. This work advances the usability and accessibility of memristive DL simulations for both algorithm and hardware co-design.

Abstract

Memristive devices have shown great promise to facilitate the acceleration and improve the power efficiency of Deep Learning (DL) systems. Crossbar architectures constructed using these Resistive Random-Access Memory (RRAM) devices can be used to efficiently implement various in-memory computing operations, such as Multiply Accumulate (MAC) and unrolled-convolutions, which are used extensively in Deep Neural Networks (DNNs) and Convolutional Neural Networks (CNNs). However, memristive devices face concerns of aging and non-idealities, which limit the accuracy, reliability, and robustness of Memristive Deep Learning Systems (MDLSs), that should be considered prior to circuit-level realization. This Original Software Publication (OSP) presents MemTorch, an open-source framework for customized large-scale memristive DL simulations, with a refined focus on the co-simulation of device non-idealities. MemTorch also facilitates co-modelling of key crossbar peripheral circuitry. MemTorch adopts a modernized soft-ware engineering methodology and integrates directly with the well-known PyTorch Machine Learning (ML) library

MemTorch: An Open-source Simulation Framework for Memristive Deep Learning Systems

TL;DR

MemTorch addresses the challenge of simulating memristive deep learning systems with realistic device non-idealities by providing a configurable, open-source co-simulation framework that integrates with PyTorch. The approach combines modular memristor crossbar representations (1T1R/0T1R), tile-based mapping, and multiple device models (e.g., linear ion drift, VTEAM, PKU RRAM) with stochastic non-idealities to study accuracy and robustness. Key contributions include a C++/CUDA/Python implementation, crossbar peripheral modeling, and demonstration of CIFAR-10/classification performance under device variability and faults. The framework enables rapid exploration of device physics and circuit-level constraints, supporting research and hardware-aware ML development. This work advances the usability and accessibility of memristive DL simulations for both algorithm and hardware co-design.

Abstract

Memristive devices have shown great promise to facilitate the acceleration and improve the power efficiency of Deep Learning (DL) systems. Crossbar architectures constructed using these Resistive Random-Access Memory (RRAM) devices can be used to efficiently implement various in-memory computing operations, such as Multiply Accumulate (MAC) and unrolled-convolutions, which are used extensively in Deep Neural Networks (DNNs) and Convolutional Neural Networks (CNNs). However, memristive devices face concerns of aging and non-idealities, which limit the accuracy, reliability, and robustness of Memristive Deep Learning Systems (MDLSs), that should be considered prior to circuit-level realization. This Original Software Publication (OSP) presents MemTorch, an open-source framework for customized large-scale memristive DL simulations, with a refined focus on the co-simulation of device non-idealities. MemTorch also facilitates co-modelling of key crossbar peripheral circuitry. MemTorch adopts a modernized soft-ware engineering methodology and integrates directly with the well-known PyTorch Machine Learning (ML) library

Paper Structure

This paper contains 27 sections, 5 equations, 5 figures, 3 tables, 1 algorithm.

Figures (5)

  • Figure 1: Simulation results when exemplar device non-idealities are considered for classifying CIFAR-10 dataset for two different modular crossbar tile sizes, 128x128 and 256x64. While MemTorch can be used to simulate both passive and active architectures, for demonstration purposes, in this figure, only active architectures are considered.
  • Figure 2: Illustration of a typical use-case workflow in MemTorch.
  • Figure 3: Depiction of an $M \times N$ [A] 1R (0T1R) crossbar architecture and a [B] 1T1R crossbar architecture. Matrix-vector and matrix-matrix multiplication can be performed by encoding and presenting a scaled input vector or matrix $\bm{A}$ as voltage signals to each row of the crossbar's WL. As shown in [A], assuming a linear I/V relationship, the total current in each column's BL is linearly proportional with the sum of the multiplication of the WL voltages and conductance values in that column, i.e., $\bm{BL}[0, :] \propto \bm{A}$[0, :] $\times$$\bm{B}$. In the 1T1R arrangement [B], individual memristive devices can be selected using SL.
  • Figure 4: Depiction of [A] device I/V characteristics, and [B] reset voltage double-sweeps demonstrating gradual switching from $R_{\text{ON}}$ to $R_{\text{OFF}}$, which can be used to achieve 10 finite stable conductance states for the VTEAM model using the TEAM 6353604 model's parameters, with a linear dependence on $w$, achieved using sinusoidal signals with a fixed frequency of 50 MHz. [C] shows distributions of $R_{\text{ON}}$ and $R_{\text{OFF}}$, which are caused by device-device variability, for a memristive device with $\bar{R}_{\text{ON}} = 100\Omega$ and $\bar{R}_{\text{OFF}} = 150\Omega$. In [C], overlapped regions are indistinguishable from each other.
  • Figure 5: Non-linear I/V characteristics for 100 devices (instances) of the VTEAM model using the TEAM 6353604 model's parameters, with a linear dependence on $w$, achieved using sinusoidal signals with a fixed frequency of 50 MHz. $R_{\text{ON}}$ and $R_{\text{OFF}}$ were stochastically sampled from a normal distribution with $\bar{x} = 50, \sigma = 25$, and $\bar{x} = 1000, \sigma = 50$, respectively. [A] depicts I/V characteristics for devices with an infinite number of discrete conductance states. [B] depicts I/V characteristics for devices with a finite number of discrete conductance states.