Logo
ScienceStack
Table of Contents
Fetching ...
Sign In

Training for Speech Recognition on Coprocessors

Sebastian Baunsgaard, Sebastian B. Wrede, Pınar Tozun

TL;DR

This work analyzes the end-to-end training efficiency of a state-of-the-art acoustic model for automatic speech recognition on three CPU-GPU co-processor platforms spanning budget classes. It adopts Time-to-Accuracy as the primary metric and evaluates on LibriSpeech, highlighting that hardware acceleration yields good results even on low-cost setups, though high-end platforms can converge faster but do not always translate to better final accuracy due to tradeoffs like batch size. The study provides detailed methodology for data preparation, model architecture, and training regimes, and underscores the importance of establish benchmarks for ASR training across diverse hardware. The findings offer practical guidance for selecting co-processor configurations and tuning training parameters to balance cost, throughput, and accuracy in real-world ASR deployments.

Abstract

Automatic Speech Recognition (ASR) has increased in popularity in recent years. The evolution of processor and storage technologies has enabled more advanced ASR mechanisms, fueling the development of virtual assistants such as Amazon Alexa, Apple Siri, Microsoft Cortana, and Google Home. The interest in such assistants, in turn, has amplified the novel developments in ASR research. However, despite this popularity, there has not been a detailed training efficiency analysis of modern ASR systems. This mainly stems from: the proprietary nature of many modern applications that depend on ASR, like the ones listed above; the relatively expensive co-processor hardware that is used to accelerate ASR by big vendors to enable such applications; and the absence of well-established benchmarks. The goal of this paper is to address the latter two of these challenges. The paper first describes an ASR model, based on a deep neural network inspired by recent work in this domain, and our experiences building it. Then we evaluate this model on three CPU-GPU co-processor platforms that represent different budget categories. Our results demonstrate that utilizing hardware acceleration yields good results even without high-end equipment. While the most expensive platform (10X price of the least expensive one) converges to the initial accuracy target 10-30% and 60-70% faster than the other two, the differences among the platforms almost disappear at slightly higher accuracy targets. In addition, our results further highlight both the difficulty of evaluating ASR systems due to the complex, long, and resource intensive nature of the model training in this domain, and the importance of establishing benchmarks for ASR.

Training for Speech Recognition on Coprocessors

TL;DR

This work analyzes the end-to-end training efficiency of a state-of-the-art acoustic model for automatic speech recognition on three CPU-GPU co-processor platforms spanning budget classes. It adopts Time-to-Accuracy as the primary metric and evaluates on LibriSpeech, highlighting that hardware acceleration yields good results even on low-cost setups, though high-end platforms can converge faster but do not always translate to better final accuracy due to tradeoffs like batch size. The study provides detailed methodology for data preparation, model architecture, and training regimes, and underscores the importance of establish benchmarks for ASR training across diverse hardware. The findings offer practical guidance for selecting co-processor configurations and tuning training parameters to balance cost, throughput, and accuracy in real-world ASR deployments.

Abstract

Automatic Speech Recognition (ASR) has increased in popularity in recent years. The evolution of processor and storage technologies has enabled more advanced ASR mechanisms, fueling the development of virtual assistants such as Amazon Alexa, Apple Siri, Microsoft Cortana, and Google Home. The interest in such assistants, in turn, has amplified the novel developments in ASR research. However, despite this popularity, there has not been a detailed training efficiency analysis of modern ASR systems. This mainly stems from: the proprietary nature of many modern applications that depend on ASR, like the ones listed above; the relatively expensive co-processor hardware that is used to accelerate ASR by big vendors to enable such applications; and the absence of well-established benchmarks. The goal of this paper is to address the latter two of these challenges. The paper first describes an ASR model, based on a deep neural network inspired by recent work in this domain, and our experiences building it. Then we evaluate this model on three CPU-GPU co-processor platforms that represent different budget categories. Our results demonstrate that utilizing hardware acceleration yields good results even without high-end equipment. While the most expensive platform (10X price of the least expensive one) converges to the initial accuracy target 10-30% and 60-70% faster than the other two, the differences among the platforms almost disappear at slightly higher accuracy targets. In addition, our results further highlight both the difficulty of evaluating ASR systems due to the complex, long, and resource intensive nature of the model training in this domain, and the importance of establishing benchmarks for ASR.
Paper Structure (32 sections, 5 equations, 10 figures, 6 tables)

This paper contains 32 sections, 5 equations, 10 figures, 6 tables.

Table of Contents

  1. Introduction
  2. Speech-to-Text
  3. Feature Extraction
  4. Acoustic Model
  5. Neural Network Layers
  6. CTC Loss & Beam Search
  7. Optimization Algorithm
  8. Regularization
  9. Batch Normalization
  10. Related Work
  11. Speech to Text Models Based on Neural Networks
  12. Benchmarking Machine Learning Models
  13. Experimental Methodology
  14. Metrics
  15. Accuracy
  16. ...and 17 more sections

Figures (10)

  • Figure 1: Speech properties.
  • Figure 2: Process of converting speech to text.
  • Figure 3: Example of FE process converting audio signal to Log Mel and MFCC.
  • Figure 4: Overview of the layers of our AM.
  • Figure 5: Overview of the co-processors used (left to right, from least expensive to most expensive).
  • ...and 5 more figures